diff --git a/02_m1284p_FATFS_Chang_tst/mmc_avr.c b/02_m1284p_FATFS_Chang_tst/mmc_avr.c index af1fbd8..2d59360 100644 --- a/02_m1284p_FATFS_Chang_tst/mmc_avr.c +++ b/02_m1284p_FATFS_Chang_tst/mmc_avr.c @@ -19,7 +19,7 @@ #include #include "diskio.h" - +#include "globals.h" /* Port controls (Platform dependent) */ @@ -113,18 +113,24 @@ void power_on (void) DDRB |= _BV(MOSI) | _BV(SCK) | _BV(CSN); PORTB |= _BV(MOSI) | _BV(SCK); + +#if defined(SPI_8_MHZ) /* Enables SPI, selects "master", clock rate FCK / 2, and SPI mode 0 */ // SPI 8Mhz - /* SPCR = _BV(SPE) | _BV(MSTR); - SPSR = _BV(SPI2X); - */ - + SPSR = _BV(SPI2X); //FCK / 2 - 8Mhz +#elif defined (SPI_4_MHZ) /* Enables SPI, selects "master", clock rate FCK / 4, and SPI mode 0 */ // SPI 4Mhz SPCR = _BV(SPE) | _BV(MSTR); - SPSR = 0x0; - + SPSR = 0x0; //FCK / 4 - 4Mhz +#else + /* Enables SPI, selects "master", clock rate FCK / 4, and SPI mode 0 */ + // SPI 4Mhz + SPCR = _BV(SPE) | _BV(MSTR); + SPSR = 0x0; //FCK / 4 - 4Mhz +#endif + } static diff --git a/02_m1284p_FATFS_LFN_Chang_tst/mmc_avr.c b/02_m1284p_FATFS_LFN_Chang_tst/mmc_avr.c index af1fbd8..2d59360 100644 --- a/02_m1284p_FATFS_LFN_Chang_tst/mmc_avr.c +++ b/02_m1284p_FATFS_LFN_Chang_tst/mmc_avr.c @@ -19,7 +19,7 @@ #include #include "diskio.h" - +#include "globals.h" /* Port controls (Platform dependent) */ @@ -113,18 +113,24 @@ void power_on (void) DDRB |= _BV(MOSI) | _BV(SCK) | _BV(CSN); PORTB |= _BV(MOSI) | _BV(SCK); + +#if defined(SPI_8_MHZ) /* Enables SPI, selects "master", clock rate FCK / 2, and SPI mode 0 */ // SPI 8Mhz - /* SPCR = _BV(SPE) | _BV(MSTR); - SPSR = _BV(SPI2X); - */ - + SPSR = _BV(SPI2X); //FCK / 2 - 8Mhz +#elif defined (SPI_4_MHZ) /* Enables SPI, selects "master", clock rate FCK / 4, and SPI mode 0 */ // SPI 4Mhz SPCR = _BV(SPE) | _BV(MSTR); - SPSR = 0x0; - + SPSR = 0x0; //FCK / 4 - 4Mhz +#else + /* Enables SPI, selects "master", clock rate FCK / 4, and SPI mode 0 */ + // SPI 4Mhz + SPCR = _BV(SPE) | _BV(MSTR); + SPSR = 0x0; //FCK / 4 - 4Mhz +#endif + } static diff --git a/03_m1284p_WIZNET_loopback_FATFS_template/globals.h b/03_m1284p_WIZNET_loopback_FATFS_template/globals.h index 64217dc..3fabed6 100644 --- a/03_m1284p_WIZNET_loopback_FATFS_template/globals.h +++ b/03_m1284p_WIZNET_loopback_FATFS_template/globals.h @@ -38,6 +38,10 @@ static FATFS Fatfs; //File system object for each logical drive. >= 2 //#define IP_WORK +//SPI CLOCK 4 or 8Mhz +#define SPI_4_MHZ +//#define SPI_8_MHZ + extern unsigned long millis(void); extern int freeRam (void); diff --git a/03_m1284p_WIZNET_loopback_FATFS_template/mmc_avr.c b/03_m1284p_WIZNET_loopback_FATFS_template/mmc_avr.c index 0557785..2d59360 100644 --- a/03_m1284p_WIZNET_loopback_FATFS_template/mmc_avr.c +++ b/03_m1284p_WIZNET_loopback_FATFS_template/mmc_avr.c @@ -19,7 +19,7 @@ #include #include "diskio.h" - +#include "globals.h" /* Port controls (Platform dependent) */ @@ -113,17 +113,24 @@ void power_on (void) DDRB |= _BV(MOSI) | _BV(SCK) | _BV(CSN); PORTB |= _BV(MOSI) | _BV(SCK); + +#if defined(SPI_8_MHZ) /* Enables SPI, selects "master", clock rate FCK / 2, and SPI mode 0 */ // SPI 8Mhz - /* SPCR = _BV(SPE) | _BV(MSTR); - SPSR = _BV(SPI2X); - */ - + SPSR = _BV(SPI2X); //FCK / 2 - 8Mhz +#elif defined (SPI_4_MHZ) + /* Enables SPI, selects "master", clock rate FCK / 4, and SPI mode 0 */ + // SPI 4Mhz + SPCR = _BV(SPE) | _BV(MSTR); + SPSR = 0x0; //FCK / 4 - 4Mhz +#else /* Enables SPI, selects "master", clock rate FCK / 4, and SPI mode 0 */ // SPI 4Mhz SPCR = _BV(SPE) | _BV(MSTR); - SPSR = 0x0; + SPSR = 0x0; //FCK / 4 - 4Mhz +#endif + } static diff --git a/03_m1284p_WIZNET_loopback_FATFS_template/spi.c b/03_m1284p_WIZNET_loopback_FATFS_template/spi.c index 4f9ee2c..40fa017 100644 --- a/03_m1284p_WIZNET_loopback_FATFS_template/spi.c +++ b/03_m1284p_WIZNET_loopback_FATFS_template/spi.c @@ -30,6 +30,8 @@ #include #include "spi.h" +#include "globals.h" + //#include "contiki-conf.h" /* @@ -77,8 +79,13 @@ spi_init(void) /* Enables SPI, selects "master", clock rate FCK / 4 - 4Mhz, and SPI mode 0 */ SPCR = _BV(SPE) | _BV(MSTR); - SPSR = 0x0; - //SPSR = _BV(SPI2X); //FCK / 2 - 8Mhz +#if defined(SPI_8_MHZ) + SPSR = _BV(SPI2X); //FCK / 2 - 8Mhz +#elif defined (SPI_4_MHZ) + SPSR = 0x0; //FCK / 4 - 4Mhz +#else + SPSR = 0x0; //FCK / 4 - 4Mhz +#endif } diff --git a/03_m1284p_WIZNET_loopback_STATIC_IP/globals.h b/03_m1284p_WIZNET_loopback_STATIC_IP/globals.h index f8c52ea..e71ae1d 100644 --- a/03_m1284p_WIZNET_loopback_STATIC_IP/globals.h +++ b/03_m1284p_WIZNET_loopback_STATIC_IP/globals.h @@ -41,6 +41,10 @@ static FATFS Fatfs; //File system object for each logical drive. >= 2 #define IP_WORK +//SPI CLOCK 4 or 8Mhz +#define SPI_4_MHZ +//#define SPI_8_MHZ + extern unsigned long millis(void); extern int freeRam (void); diff --git a/03_m1284p_WIZNET_loopback_STATIC_IP/spi.c b/03_m1284p_WIZNET_loopback_STATIC_IP/spi.c index 3dfca25..40fa017 100644 --- a/03_m1284p_WIZNET_loopback_STATIC_IP/spi.c +++ b/03_m1284p_WIZNET_loopback_STATIC_IP/spi.c @@ -30,6 +30,8 @@ #include #include "spi.h" +#include "globals.h" + //#include "contiki-conf.h" /* @@ -77,7 +79,13 @@ spi_init(void) /* Enables SPI, selects "master", clock rate FCK / 4 - 4Mhz, and SPI mode 0 */ SPCR = _BV(SPE) | _BV(MSTR); - //SPSR = _BV(SPI2X); //FCK / 2 - 8Mhz +#if defined(SPI_8_MHZ) + SPSR = _BV(SPI2X); //FCK / 2 - 8Mhz +#elif defined (SPI_4_MHZ) + SPSR = 0x0; //FCK / 4 - 4Mhz +#else + SPSR = 0x0; //FCK / 4 - 4Mhz +#endif }