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			51 lines
		
	
	
		
			1.2 KiB
		
	
	
	
		
			C
		
	
			
		
		
	
	
			51 lines
		
	
	
		
			1.2 KiB
		
	
	
	
		
			C
		
	
| #include <avr/io.h>
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| #include "spi.h"
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| #include "globals.h"
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| 
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| /*
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|  * Initialize SPI bus.
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|  */
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| 
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| //~ // From working SPI ENC28J60 driver
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| //~ #define ENC28J60_CONTROL_PORT   PORTB
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| //~ #define ENC28J60_CONTROL_DDR    DDRB
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| //~ 
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| //~ #define ENC28J60_CONTROL_CS PORTB6
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| //~ #define ENC28J60_CONTROL_SO PORTB3
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| //~ #define ENC28J60_CONTROL_SI PORTB2
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| //~ #define ENC28J60_CONTROL_SCK PORTB1
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| //~ #define ENC28J60_CONTROL_SS PORTB0
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| //~ 
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| //~ // set CS to 0 = active
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| //~ #define CSACTIVE ENC28J60_CONTROL_PORT&=~(1<<ENC28J60_CONTROL_CS)
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| //~ // set CS to 1 = passive
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| //~ #define CSPASSIVE ENC28J60_CONTROL_PORT|=(1<<ENC28J60_CONTROL_CS)
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| //
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| //~ #define waitspi() while(!(SPSR&(1<<SPIF)))
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|  
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| 
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| void
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| spi_init(void)
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| {
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|   // CS PIN for FLASH
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|   DDRB	|= _BV(WIZNET_CS); // CS to OUT && Disable
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|   SPI_WIZNET_DISABLE();
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|   
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|   /* Initalize ports for communication with SPI units. */
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|   /* CSN=SS and must be output when master! */
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|   DDRB  |= _BV(MOSI) | _BV(SCK) | _BV(CSN);
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|   PORTB |= _BV(MOSI) | _BV(SCK);
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|  
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|   /* Enables SPI, selects "master", clock rate FCK / 4 - 4Mhz, and SPI mode 0 */
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|   SPCR = _BV(SPE) | _BV(MSTR);
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| #if defined(SPI_8_MHZ)
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|   SPSR = _BV(SPI2X); //FCK / 2 - 8Mhz
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| #elif defined (SPI_4_MHZ)
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|   SPSR = 0x0; //FCK / 4 - 4Mhz
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| #else
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|   SPSR = 0x0; //FCK / 4 - 4Mhz
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| #endif
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| 
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| 
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| }
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