diff --git a/22_m1284p_WIZNET_MQTT/spi.c b/22_m1284p_WIZNET_MQTT/spi.c
index 47d9c33..72a9e1c 100644
--- a/22_m1284p_WIZNET_MQTT/spi.c
+++ b/22_m1284p_WIZNET_MQTT/spi.c
@@ -1,50 +1,37 @@
-#include <avr/io.h>
 #include "spi.h"
-#include "globals.h"
 
-/*
- * Initialize SPI bus.
- */
+void spi_select(void)
+{
+    CS_PORT&=~(1<<CS_BIT);
+}
 
-//~ // From working SPI ENC28J60 driver
-//~ #define ENC28J60_CONTROL_PORT   PORTB
-//~ #define ENC28J60_CONTROL_DDR    DDRB
-//~ 
-//~ #define ENC28J60_CONTROL_CS PORTB6
-//~ #define ENC28J60_CONTROL_SO PORTB3
-//~ #define ENC28J60_CONTROL_SI PORTB2
-//~ #define ENC28J60_CONTROL_SCK PORTB1
-//~ #define ENC28J60_CONTROL_SS PORTB0
-//~ 
-//~ // set CS to 0 = active
-//~ #define CSACTIVE ENC28J60_CONTROL_PORT&=~(1<<ENC28J60_CONTROL_CS)
-//~ // set CS to 1 = passive
-//~ #define CSPASSIVE ENC28J60_CONTROL_PORT|=(1<<ENC28J60_CONTROL_CS)
-//
-//~ #define waitspi() while(!(SPSR&(1<<SPIF)))
- 
+void spi_deselect(void)
+{
+    CS_PORT|=(1<<CS_BIT);
+}
 
-void
-spi_init(void)
+unsigned char spi_xchg(unsigned char val)
 {
-  // CS PIN for FLASH
-  DDRB	|= _BV(WIZNET_CS); // CS to OUT && Disable
-  SPI_WIZNET_DISABLE();
-  
-  /* Initalize ports for communication with SPI units. */
-  /* CSN=SS and must be output when master! */
-  DDRB  |= _BV(MOSI) | _BV(SCK) | _BV(CSN);
-  PORTB |= _BV(MOSI) | _BV(SCK);
- 
-  /* Enables SPI, selects "master", clock rate FCK / 4 - 4Mhz, and SPI mode 0 */
-  SPCR = _BV(SPE) | _BV(MSTR);
-#if defined(SPI_8_MHZ)
-  SPSR = _BV(SPI2X); //FCK / 2 - 8Mhz
-#elif defined (SPI_4_MHZ)
-  SPSR = 0x0; //FCK / 4 - 4Mhz
-#else
-  SPSR = 0x0; //FCK / 4 - 4Mhz
-#endif
+	SPDR = val;
+	while (!(SPSR & (1 << SPIF))) ;
+	return SPDR;
+}
+
+uint8_t spi_read(){
+	return spi_xchg(0x00);
+}
+
+void spi_write(uint8_t d){
+	spi_xchg(d);
+}
 
+void spi_init(){
+	CS_PORT |= (1 << CS_BIT);	// pull CS pin high
+	CS_DDR |= (1 << CS_BIT);	// now make it an output
 
+	SPI_PORT |= (1 << 0);	// make sure SS is high
+	SPI_DDR = (1 << PORTB2) | (1 << PORTB1) | (1 << PORTB0);	// set MOSI, SCK and SS as output, others as input
+	SPCR = (1 << SPE) | (1 << MSTR);	// enable SPI, master mode 0
+	SPCR |= (1 << SPR0) | (0<<SPR1); // div 128
+	SPSR |= (0 << SPI2X);	// set the clock rate fck/2
 }
diff --git a/22_m1284p_WIZNET_MQTT/spi.h b/22_m1284p_WIZNET_MQTT/spi.h
index 7c1da0e..4150c72 100644
--- a/22_m1284p_WIZNET_MQTT/spi.h
+++ b/22_m1284p_WIZNET_MQTT/spi.h
@@ -1,92 +1,20 @@
-#ifndef SPI_H_
-#define SPI_H_
+#ifndef _SPI_H_
+#define _SPI_H_
 
-/* SPI input/output registers. */
-#define SPI_TXBUF SPDR
-#define SPI_RXBUF SPDR
+#include <avr/io.h>
 
-#define BV(bitno) _BV(bitno)
+#define SPI_PORT        PORTB	/* target-specific port containing the SPI lines */
+#define SPI_DDR         DDRB	/* target-specific DDR for the SPI port lines */
 
-#define SPI_WAITFOREOTx() do { while (!(SPSR & BV(SPIF))); } while (0)
-#define SPI_WAITFOREORx() do { while (!(SPSR & BV(SPIF))); } while (0)
-
-//M128
-//#define SCK            1  /* - Output: SPI Serial Clock (SCLK) - ATMEGA128 PORTB, PIN1 */
-//#define MOSI           2  /* - Output: SPI Master out - slave in (MOSI) - ATMEGA128 PORTB, PIN2 */
-//#define MISO           3  /* - Input:  SPI Master in - slave out (MISO) - ATMEGA128 PORTB, PIN3 */
-//#define CSN            0  /*SPI - SS*/
-//#define FLASH_CS       6       /* PB.6 Output as CS*/
-
-//M644p/M1284p
-#define SCK            7  /* - Output: SPI Serial Clock (SCLK) - ATMEGA644/1284 PORTB, PIN7 */
-#define MOSI           5  /* - Output: SPI Master out - slave in (MOSI) -  ATMEGA644/1284 PORTB, PIN5 */
-#define MISO           6  /* - Input:  SPI Master in - slave out (MISO) -  ATMEGA644/1284 PORTB, PIN6 */
-#define CSN            4  /*SPI - SS*/
-
-//#define FLASH_CS       3       /* PB.2 Output as CS*/
-//#define FLASH_CS       2       /* PB.2 Output as CS*/
-//#define CAN_CS         1       /* PB.1 Output as CS for CAN MCP2515*/
-
-//#define SPI_FLASH_ENABLE()  ( PORTB &= ~BV(FLASH_CS) )
-//#define SPI_FLASH_DISABLE() ( PORTB |=  BV(FLASH_CS) )
-
-#define WIZNET_CS       3       /* PB.3 Output as CS for Wiznet ETHERNET*/
-#define SPI_WIZNET_ENABLE()  ( PORTB &= ~BV(WIZNET_CS) )
-#define SPI_WIZNET_DISABLE() ( PORTB |=  BV(WIZNET_CS) )
-
-#define SD_CS       0       /* PB.0 Output as CS for SD-reader*/
-#define SPI_SD_ENABLE()  ( PORTB &= ~BV(SD_CS) )
-#define SPI_SD_DISABLE() ( PORTB |=  BV(SD_CS) )
-
-
-
-
-/* Define macros to use for checking SPI transmission status depending
-   on if it is possible to wait for TX buffer ready. This is possible
-   on for example MSP430 but not on AVR. */
-#ifdef SPI_WAITFORTxREADY
-#define SPI_WAITFORTx_BEFORE() SPI_WAITFORTxREADY()
-#define SPI_WAITFORTx_AFTER()
-#define SPI_WAITFORTx_ENDED() SPI_WAITFOREOTx()
-#else /* SPI_WAITFORTxREADY */
-#define SPI_WAITFORTx_BEFORE()
-#define SPI_WAITFORTx_AFTER() SPI_WAITFOREOTx()
-#define SPI_WAITFORTx_ENDED()
-#endif /* SPI_WAITFORTxREADY */
+#define CS_DDR          DDRJ	/* target-specific DDR for chip-select */
+#define CS_PORT         PORTJ	/* target-specific port used as chip-select */
+#define CS_BIT          3	/* target-specific port line used as chip-select */
 
+uint8_t spi_read();
+void spi_write(uint8_t d);
+void spi_select(void);
+void spi_deselect(void);
+unsigned char spi_xchg(unsigned char val);
 void spi_init(void);
 
-/* Write one character to SPI */
-#define SPI_WRITE(data)                         \
-  do {                                          \
-    SPI_WAITFORTx_BEFORE();                     \
-    SPI_TXBUF = data;                           \
-    SPI_WAITFOREOTx();                          \
-  } while(0)
-
-/* Write one character to SPI - will not wait for end
-   useful for multiple writes with wait after final */
-#define SPI_WRITE_FAST(data)                    \
-  do {                                          \
-    SPI_WAITFORTx_BEFORE();                     \
-    SPI_TXBUF = data;                           \
-    SPI_WAITFORTx_AFTER();                      \
-  } while(0)
-
-/* Read one character from SPI */
-#define SPI_READ(data)   \
-  do {                   \
-    SPI_TXBUF = 0;       \
-    SPI_WAITFOREORx();   \
-    data = SPI_RXBUF;    \
-  } while(0)
-
-/* Flush the SPI read register */
-#ifndef SPI_FLUSH
-#define SPI_FLUSH() \
-  do {              \
-    SPI_RXBUF;      \
-  } while(0);
 #endif
-
-#endif /* SPI_H_ */