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147 lines
3.7 KiB
C
147 lines
3.7 KiB
C
#include <avr/io.h>
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#include <avr/interrupt.h>
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#include <stdint.h>
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#include <util/delay.h>
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#include "yaMBSiavr.h"
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uint8_t font[] = {
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0xEE,
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0x82,
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0xDC,
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0xD6,
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0xB2,
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0x76,
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0x7E,
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0xC2,
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0xFE,
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0xF6,
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};
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uint16_t bcd;
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uint8_t display[4];
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volatile uint16_t holdingRegisters[4];
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volatile uint8_t outstate = 0;
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void timer0_init()
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{
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TCCR0 = (1<<WGM01); //TIMER0 SET-UP: CTC MODE
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TCCR0 = (1<<CS01)|(1<<CS00); // PS 1:64
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OCR0 = 249; // 1ms reach for clear (16mz:64=>250kHz:250-=>1kHz)
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TIMSK |= 1<<OCIE0; //IRQ on TIMER0 output compareA
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}
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void timer2_init(void) {
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//TCCR2 = (1<<WGM21); //TIMER0 SET-UP: CTC MODE
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//TCCR2 = (1<<CS21)|(1<<CS20); // PS 1:64
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//OCR2 = 25; // 1ms reach for clear (16mz:64=>250kHz:250-=>1kHz)
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//TIMSK |= 1<<OCIE2; //IRQ on TIMER0 output compareA
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TCCR2|=(1<<CS21); //prescaler 8
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TIMSK|=(1<<TOIE2);
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}
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unsigned long bin2bcd (uint32_t n) // convert 16 bit binary n to 5 digit BCD (packed)
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{
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return n + 6 * (n/10 + 16*(n/100) + 256*(n/1000) + 4096*(n/10000));
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}
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void modbusGet(void) {
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if (modbusGetBusState() & (1<<ReceiveCompleted))
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{
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switch(rxbuffer[1]) {
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case fcReadHoldingRegisters:
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holdingRegisters[1] = bcd;
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modbusExchangeRegisters(holdingRegisters,0,4);
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break;
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case fcPresetMultipleRegisters:
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modbusExchangeRegisters(holdingRegisters,0,1);
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uint8_t h = holdingRegisters[0] / 3600;
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uint8_t m = (holdingRegisters[0] / 60) % 60;
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uint8_t s = holdingRegisters[0] % 60;
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if(h)
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bcd = bin2bcd(m) | bin2bcd(h)<<8;
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else
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bcd = bin2bcd(s) | bin2bcd(m)<<8;
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break;
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case fcReadCoilStatus:
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modbusExchangeBits(&outstate,0,8);
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break;
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case fcForceMultipleCoils:
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case fcForceSingleCoil:
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modbusExchangeBits(&outstate,0,8);
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if(outstate & 0x01)
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PORTB|=1<<4;
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else
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PORTB&=~(1<<4);
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if(outstate & 0x02){
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PORTA |= _BV(7);
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_delay_ms(250); // well ...
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PORTA &= ~_BV(7);
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outstate &= ~0x02;
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}
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break;
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default:
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modbusSendException(ecIllegalFunction);
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break;
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}
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}
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}
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int main(void){
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DDRB |= _BV(3) | _BV(2) | _BV(1) | _BV(0); // led anodes
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DDRB |= _BV(4); // dots
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DDRD = 0xFC; // uln output 1
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DDRA |= _BV(5) | _BV(4);
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DDRC = 0xFE; // uln output 2
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DDRA |= _BV(7); // ejector out
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modbusSetAddress(24);
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modbusInit();
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timer0_init();
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timer2_init();
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sei();
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while(1){
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display[0] = font[(bcd&0x000f)];
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display[1] = font[(bcd&0x00f0) >> 4];
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display[2] = font[(bcd&0x0f00) >> 8];
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display[3] = bcd&0xF000 ? font[(bcd&0xf000) >> 12] : 0;
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modbusGet();
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}
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}
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ISR(TIMER0_COMP_vect) {
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if(outstate & 0x01){
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if(PORTB & 0x01){
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PORTB = (PORTB & 0xF0) | 1<<1 | 1<<3;
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PORTD = display[3] & 0xFC;
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PORTA = (PORTA & 0xCF) | (display[3] & 0x03) << 4;
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PORTC = display[1];
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}
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else{
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PORTB = (PORTB & 0xF0) | 1<<0 | 1<<2;
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PORTD = display[2] & 0xFC;
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PORTA = (PORTA & 0xCF) | (display[2] & 0x03) << 4;
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PORTC = display[0];
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}
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}
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else{
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PORTB &= ~0x0F;
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}
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}
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ISR(TIMER2_OVF_vect) { //this ISR is called 9765.625 times per second
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modbusTickTimer();
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}
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