Merge branch 'main' of gitlab.ibr.cs.tu-bs.de:vss/teaching/ss25/v_bsb1/Gruppe_018

main
Eggert Jung 4 months ago
commit 68f0381c01

195
1

@ -0,0 +1,195 @@
#include "arch/lapic.h"
#include "boot/startup_ap.h"
#include "arch/core_interrupt.h"
#include "debug/copystream.h"
#include "debug/output.h"
#include "debug/assert.h"
#include "arch/cga.h"
#include "arch/textwindow.h"
#include "arch/serial.h"
#include "device/serialstream.h"
#include "device/textstream.h"
#include "device/ps2controller.h"
#include "arch/ioapic.h"
#include "thread/scheduler.h"
#include "user/app1/appl.h"
#include "sync/ticketlock.h"
#include "interrupt/guard.h"
#include "arch/context.h"
#include "thread/thread.h"
///TextStream kout = TextStream(0, 80, 0, 10, true);
Ticketlock koutlock;
Scheduler sch;
//TextStream dout[8] = {
// TextStream(0 ,20,12,25,false),
// TextStream(20,40,12,25,false),
// TextStream(40,60,12,25,false),
// TextStream(60,80,12,25,false),
// TextStream(0 ,0 ,0, 0,false),
// TextStream(0 ,0 ,0, 0,false),
// TextStream(0 ,0 ,0, 0,false),
// TextStream(0 ,0 ,0, 0,false),
//};
TextStream dout[Core::MAX] = {
{0, 40, 10, 14},
{40, 80, 10, 14},
{0, 40, 14, 18},
{40, 80, 14, 18},
{0, 40, 18, 22},
{40, 80, 18, 22},
{0, 40, 22, 25},
{40, 80, 22, 25},
};
CopyStream copystream[Core::MAX]{
{&dout[0], &sout},
{&dout[1], &sout},
{&dout[2], &sout},
{&dout[3], &sout},
{&dout[4], &sout},
{&dout[5], &sout},
{&dout[6], &sout},
{&dout[7], &sout},
};
OutputStream* copyout[Core::MAX]{
&dout[0],
&copystream[1],
&dout[2],
&dout[3],
&dout[4],
&dout[5],
&dout[6],
&dout[7]
};
unsigned int testx, testy;
uint8_t test1_stack[1024];
uint8_t test2_stack[1024];
uint8_t test3_stack[1024];
uint8_t test4_stack[1024];
uint8_t test5_stack[1024];
uint8_t test6_stack[1024];
uint8_t test7_stack[1024];
uint8_t test8_stack[1024];
uint8_t test9_stack[1024];
//Thread test1_thread = Thread(&test1_stack[sizeof(test1_stack)-1]);
Application application1 = Application(&test1_stack[sizeof(test1_stack)-1]);
Application application2 = Application(&test2_stack[sizeof(test2_stack)-1]);
Application application3 = Application(&test3_stack[sizeof(test3_stack)-1]);
Application application4 = Application(&test4_stack[sizeof(test4_stack)-1]);
Application application5 = Application(&test5_stack[sizeof(test5_stack)-1]);
Application application6 = Application(&test6_stack[sizeof(test5_stack)-1]);
Application application7 = Application(&test7_stack[sizeof(test5_stack)-1]);
Application application8 = Application(&test8_stack[sizeof(test5_stack)-1]);
Application application9 = Application(&test9_stack[sizeof(test5_stack)-1]);
//Context test2;
//uint8_t test2_stack[256];
//Thread test2_thread = Thread(&test2_stack[sizeof(test2_stack)-1]);
//void test_func1(){
// while(1){
// {
// Guarded g = Guard::enter();
// g.vault().kout << "test 1\n" << flush;
// }
// context_switch(&test2, &test1);
// }
//}
//
//void test_func2(){
// while(1){
// {
// Guarded g = Guard::enter();
// g.vault().kout << "test 2\n" << flush;
// }
// context_switch(&test1, &test2);
// }
//}
// Main function
// (the bootstrap processor starts here)}
extern "C" int main() {
CGA::setCursor(0, 0);
unsigned int numCPUs = Core::count();
/* Start application processors
* To avoid unexpected behaviour, make sure that interrupts are not
* enabled before the APs are booted. Otherwise it might interfere with the
* Startup IPIs or even block devices like keyboard because of a missing EOI
*/
{
Guarded g = Guard::enter();
sch.ready(&application1);
sch.ready(&application2);
sch.ready(&application3);
sch.ready(&application4);
sch.ready(&application5);
sch.ready(&application6);
sch.ready(&application7);
sch.ready(&application8);
sch.ready(&application9);
}
ApplicationProcessor::boot();
PS2Controller::init();
IOAPIC::init();
IOAPIC::config(1, Core::Interrupt::KEYBOARD);
IOAPIC::allow(1);
Core::Interrupt::enable();
PS2Controller::drainBuffer();
DBG << "Main CPU " << static_cast<int>(LAPIC::getID()) << endl << flush;
{
Guarded g = Guard::enter();
sch.schedule();
}
//Application{}.action();
while (true){
//DBG << "pos: " << testx << ", " << testy << endl << flush;
//Core::pause();
}
return 0;
}
// Main function for application processors
extern "C" int main_ap() {
DBG_VERBOSE << "CPU core " << static_cast<int>(Core::getID()) << " / LAPIC "
<< static_cast<int>(LAPIC::getID()) << " in main_ap()" << endl;
Core::Interrupt::enable();
DBG << "App CPU " << static_cast<int>(Core::getID()) << endl << flush;
{
Guarded g = Guard::enter();
sch.schedule();
}
//assert(Core::getID() != 1);
//Application{}.action();
return 0;
}

@ -69,9 +69,7 @@ enum Vector {
// Interrupts // Interrupts
KEYBOARD=32, KEYBOARD=32,
PANIC=33, PANIC=33,
TIMER=34
TIMER = 251,
ASSASSIN = 252,
}; };
constexpr size_t VECTORS = 256; constexpr size_t VECTORS = 256;

@ -124,7 +124,8 @@ void initInterruptHandlers() {
// TODO: Add more handlers here // TODO: Add more handlers here
IDT::set(Core::Interrupt::Vector::KEYBOARD, IDT::set(Core::Interrupt::Vector::KEYBOARD,
IDT::InterruptDescriptor::Returning(handle_keyboard_asm)); IDT::InterruptDescriptor::Returning(handle_keyboard_asm));
IDT::set(Core::Interrupt::Vector::TIMER,
IDT::InterruptDescriptor::Returning(handle_timer));
// Load the idt pointer // Load the idt pointer
IDT::load(); IDT::load();
} }

@ -71,12 +71,27 @@ OutputStream* copyout[Core::MAX]{
unsigned int testx, testy; unsigned int testx, testy;
#define APP_NUM 7 uint8_t test1_stack[1024];
uint8_t test2_stack[1024];
uint8_t test3_stack[1024];
uint8_t test4_stack[1024];
uint8_t test5_stack[1024];
uint8_t test6_stack[1024];
uint8_t test7_stack[1024];
uint8_t test8_stack[1024];
uint8_t test9_stack[1024];
uint8_t app_stack[1024][APP_NUM];
Application application[APP_NUM];
application[0] = Application(&app_stack[sizeof(app_stack[0])-1]);
Application application1 = Application(&test1_stack[sizeof(test1_stack)-1]);
Application application2 = Application(&test2_stack[sizeof(test2_stack)-1]);
Application application3 = Application(&test3_stack[sizeof(test3_stack)-1]);
Application application4 = Application(&test4_stack[sizeof(test4_stack)-1]);
Application application5 = Application(&test5_stack[sizeof(test5_stack)-1]);
Application application6 = Application(&test6_stack[sizeof(test5_stack)-1]);
Application application7 = Application(&test7_stack[sizeof(test5_stack)-1]);
Application application8 = Application(&test8_stack[sizeof(test5_stack)-1]);
Application application9 = Application(&test9_stack[sizeof(test5_stack)-1]);
// Main function // Main function
@ -98,6 +113,10 @@ extern "C" int main() {
sch.ready(&application3); sch.ready(&application3);
sch.ready(&application4); sch.ready(&application4);
sch.ready(&application5); sch.ready(&application5);
sch.ready(&application6);
sch.ready(&application7);
sch.ready(&application8);
sch.ready(&application9);
} }
LAPIC::Timer::setup(1000000); LAPIC::Timer::setup(1000000);

@ -0,0 +1,4 @@
scheduler in vault
next implementieren
thread kill nicht in die liste enqueuen, scheduler.cc zeile 26
setzen von epi flags interrupt vermutlich disablen.
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