#include "arch/lapic.h"
#include "boot/startup_ap.h"
#include "arch/core_interrupt.h"
#include "debug/copystream.h"
#include "debug/output.h"
#include "debug/assert.h"

#include "arch/cga.h"
#include "arch/textwindow.h"
#include "arch/serial.h"
#include "device/serialstream.h"
#include "device/textstream.h"
#include "device/ps2controller.h"
#include "arch/ioapic.h"
#include "thread/scheduler.h"
#include "user/app1/appl.h"
#include "sync/ticketlock.h"
#include "interrupt/guard.h"

#include "arch/context.h"
#include "thread/thread.h"

///TextStream kout = TextStream(0, 80, 0, 10, true);
Ticketlock koutlock;
//Scheduler sch;

//TextStream dout[8] = {
//    TextStream(0 ,20,12,25,false), 
//    TextStream(20,40,12,25,false),
//    TextStream(40,60,12,25,false),
//    TextStream(60,80,12,25,false),
//    TextStream(0 ,0 ,0, 0,false),
//    TextStream(0 ,0 ,0, 0,false),
//    TextStream(0 ,0 ,0, 0,false),
//    TextStream(0 ,0 ,0, 0,false),
//};


TextStream dout[Core::MAX] = {
    {0,  40, 10, 14},
    {40, 80, 10, 14},
    {0,  40, 14, 18},
    {40, 80, 14, 18},
    {0,  40, 18, 22},
    {40, 80, 18, 22},
    {0,  40, 22, 25},
    {40, 80, 22, 25},
};

CopyStream copystream[Core::MAX]{
    {&dout[0], &sout},
    {&dout[1], &sout},
    {&dout[2], &sout},
    {&dout[3], &sout},
    {&dout[4], &sout},
    {&dout[5], &sout},
    {&dout[6], &sout},
    {&dout[7], &sout},
};

OutputStream* copyout[Core::MAX]{
    &dout[0],
    &copystream[1],
    &dout[2],
    &dout[3],
    &dout[4],
    &dout[5],
    &dout[6],
    &dout[7]
};

unsigned int testx, testy;

uint8_t test1_stack[1024];
uint8_t test2_stack[1024];
uint8_t test3_stack[1024];
uint8_t test4_stack[1024];
uint8_t test5_stack[1024];
uint8_t test6_stack[1024];
uint8_t test7_stack[1024];
uint8_t test8_stack[1024];
uint8_t test9_stack[1024];



Application application1 = Application(&test1_stack[sizeof(test1_stack)-1]);
Application application2 = Application(&test2_stack[sizeof(test2_stack)-1]);
Application application3 = Application(&test3_stack[sizeof(test3_stack)-1]);
Application application4 = Application(&test4_stack[sizeof(test4_stack)-1]);
Application application5 = Application(&test5_stack[sizeof(test5_stack)-1]);
Application application6 = Application(&test6_stack[sizeof(test5_stack)-1]);
Application application7 = Application(&test7_stack[sizeof(test5_stack)-1]);
Application application8 = Application(&test8_stack[sizeof(test5_stack)-1]);
Application application9 = Application(&test9_stack[sizeof(test5_stack)-1]);


// Main function
// (the bootstrap processor starts here)}
extern "C" int main() {
  CGA::setCursor(0, 0);

  unsigned int numCPUs = Core::count();
  /* Start application processors
   * To avoid unexpected behaviour, make sure that interrupts are not
   * enabled before the APs are booted. Otherwise it might interfere with the
   * Startup IPIs or even block devices like keyboard because of a missing EOI
   */

  {
      Guarded g = Guard::enter();
      Scheduler &sch =g.vault().sch;
      sch.ready(&application1);
      sch.ready(&application2);
      sch.ready(&application3);
      sch.ready(&application4);
      sch.ready(&application5);
      sch.ready(&application6);
      sch.ready(&application7);
      sch.ready(&application8);
      sch.ready(&application9);
  }

  LAPIC::Timer::setup(1000000);

  ApplicationProcessor::boot();
  
  PS2Controller::init();

  IOAPIC::init();
  IOAPIC::config(1, Core::Interrupt::KEYBOARD);
  IOAPIC::allow(1);

  Core::Interrupt::enable();

  LAPIC::Timer::activate();
  PS2Controller::drainBuffer();

  DBG << "Main CPU " << static_cast<int>(LAPIC::getID()) << endl << flush;



  {
      Guarded g = Guard::enter();
     g.vault().sch.schedule();
  }


  //Application{}.action();
  while (true){
      //DBG << "pos: " << testx << ", " << testy << endl << flush;
      //Core::pause();
  }

  return 0;
}

// Main function for application processors
extern "C" int main_ap() {
  DBG_VERBOSE << "CPU core " << static_cast<int>(Core::getID()) << " / LAPIC "
              << static_cast<int>(LAPIC::getID()) << " in main_ap()" << endl;
  Core::Interrupt::enable();

  DBG << "App CPU " << static_cast<int>(Core::getID()) << endl << flush;

  {
      Guarded g = Guard::enter();
      g.vault().sch.schedule();
  }

  //assert(Core::getID() != 1);
  //Application{}.action();

  return 0;
}