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142 lines
4.8 KiB
C++
142 lines
4.8 KiB
C++
/*! \file
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* \brief \ref Core::Interrupt "Interrupt control" and \ref
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* Core::Interrupt::Vector "interrupt vector list"
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*/
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#pragma once
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#include "../types.h"
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namespace Core {
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/*! \brief Exception and Interrupt control
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*
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* \see [ISDMv3, Chapter 6 Interrupt and Exception
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* Handling](intel_manual_vol3.pdf#page=185)
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*/
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namespace Interrupt {
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/*! \brief Bit in `FLAGS` register corresponding to the current interrupt state
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*/
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constexpr uintptr_t FLAG_ENABLE = 1 << 9;
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/*! \brief List of used interrupt vectors.
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*
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* The exception vectors from `0` to `31` are reserved for traps, faults and
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* aborts. Their behavior is different for each exception, some push an *error
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* code*, some are not recoverable.
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*
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* The vectors from `32` to `255` are user defined interrupts.
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*
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* \see [ISDMv3, 6.15 Exception and Interrupt
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* Reference](intel_manual_vol3.pdf#page=203)
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* \todo(12) Add Keyboard and Panic vector numbers
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*/
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enum Vector {
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// Predefined Exceptions
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DIVISON_BY_ZERO =
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0, ///< Divide-by-zero Error (at a `DIV`/`IDIV` instruction)
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DEBUG = 1, ///< Debug exception
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NON_MASKABLE_INTERRUPT = 2, ///< Non Maskable Interrupt
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BREAKPOINT = 3, ///< Breakpoint exception (used for debugging)
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OVERFLOW = 4, ///< Overflow exception (at `INTO` instruction)
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BOUND_RANGE_EXCEEDED = 5, ///< Bound Range Exceeded (at `BOUND` instruction)
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INVALID_OPCODE = 6, ///< Opcode at Instruction Pointer is invalid (you
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///< probably shouldn't be here)
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DEVICE_NOT_AVAILABLE =
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7, ///< FPU/MMX/SSE instruction but corresponding extension not activated
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DOUBLE_FAULT = 8, ///< Exception occurred while trying to call
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///< exception/interrupt handler
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// Coprocessor Segment Overrun (Legacy)
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INVALID_TSS =
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10, ///< Invalid Task State Segment selector (see error code for index)
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SEGMENT_NOT_PRESENT =
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11, ///< Segment not available (see error code for selector index)
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STACK_SEGMENT_FAULT = 12, ///< Stack segment not available or invalid (see
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///< error code for selector index)
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GENERAL_PROTECTION_FAULT =
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13, ///< Operation not allowed (see error code for selector index)
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PAGE_FAULT = 14, ///< Operation on Page (r/w/x) not allowed for current
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///< privilege (error code + `cr2`)
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// reserved
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FLOATING_POINT_EXCEPTION = 16, ///< x87 FPU error (at `WAIT`/`FWAIT`),
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///< accidentally \ref Core::CR0_NE set?
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ALIGNMENT_CHECK = 17, ///< Unaligned memory access in userspace (Exception
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///< activated by \ref Core::CR0_AM)
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MACHINE_CHECK = 18, ///< Model specific exception
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SIMD_FP_EXCEPTION =
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19, ///< SSE/MMX error (if \ref Core::CR4_OSXMMEXCPT activated)
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SECURITY_EXCEPTION = 31,
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// Interrupts
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};
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constexpr size_t VECTORS = 256;
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/*! \brief Check if interrupts are enabled on this CPU
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*
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* This is done by pushing the `FLAGS` register onto stack,
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* reading it into a register and checking the corresponding bit.
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*
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* \return `true` if enabled, `false` if disabled
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*/
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inline bool isEnabled() {
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uintptr_t out;
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asm volatile(
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"pushf\n\t"
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"pop %0\n\t"
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: "=r"(out)
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:
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: "memory");
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return (out & FLAG_ENABLE) != 0;
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}
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/*! \brief Allow interrupts
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*
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* Enables interrupt handling by executing the instruction `sti`.
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* Since this instruction is delayed by one cycle, an subsequent `nop` is
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* executed (to ensure deterministic behavior, independent from the compiler
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* generated code)
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*
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* A pending interrupt (i.e., those arriving while interrupts were disabled)
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* will be delivered after re-enabling interrupts.
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*
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* \see [ISDMv2, Chapter 4. STI - Set Interrupt
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* Flag](intel_manual_vol2.pdf#page=1297)
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*/
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inline void enable() { asm volatile("sti\n\t nop\n\t" : : : "memory"); }
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/*! \brief Forbid interrupts
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*
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* Prevents interrupt handling by executing the instruction `cli`.
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* Will return the previous interrupt state.
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* \return `true` if interrupts were enabled at the time of executing this
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* function, `false` if they were already disabled.
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*
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* \see [ISDMv2, Chapter 3. CLI - Ckear Interrupt
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* Flag](intel_manual_vol2.pdf#page=245)
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*/
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inline bool disable() {
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bool enabled = isEnabled();
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asm volatile("cli\n\t" : : : "memory");
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return enabled;
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}
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/*! \brief Restore interrupt
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*
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* Restore the interrupt state to the state prior to calling \ref disable() by
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* using its return value.
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*
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* \note This function will never disable interrupts, even if val is false!
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* This function is designed to allow nested disabling and restoring of
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* the interrupt state.
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*
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* \param val if set to `true`, interrupts will be enabled; nothing will happen
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* on false.
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*/
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inline void restore(bool val) {
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if (val) {
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enable();
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}
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}
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} // namespace Interrupt
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} // namespace Core
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