/*! \file
 *  \brief Task State Segment
 */

#pragma once
#include "../types.h"

/*! \brief Task State Segment
 */
namespace TSS {

/*! \brief TSS Format structure
 *
 * \see [ISDMv3 7.7 Task Management in 64-bit](intel_manual_vol3.pdf#page=252)
 */
struct Entry {
	uint32_t : 32;
	void* sp0;	///< Saves the stack pointer for every ring
	void* sp1;
	void* sp2;
	uint64_t : 64;
	void* ist1;
	void*
		ist2;  ///< Interrupt Stack Table, stack pointer used by the instruction
	void* ist3;	 ///< handlers when the interrupt descriptor table (IDT) is set
	///< up accordingly:
	void* ist4;	 ///< If IST is set to a non-zero value (i.e., 1 - 7),
	void* ist5;	 ///< the CPU automagically locals the respective value into the
	///< RSP.
	void* ist6;	 ///<
	void* ist7;	 ///< See https://wiki.osdev.org/Task_State_Segment
	uint64_t : 64;
	uint32_t : 16;
	uint32_t iomap_base : 16;  ///< Offset to IO Permission Bitmap
} __attribute__((packed));

static_assert(sizeof(Entry) == 104, "TaskStateSegment Entry has wrong size");

/*! \brief Initialize TSS for active core
 */
void init();

/*! \brief Set initial stack pointer in TSS
 *  \param ptr New (next) stack pointer
 */
void setStackpointer(void* ptr);

}  // namespace TSS