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1 .file "main.c"
2 __SP_H__ = 0x3e
3 __SP_L__ = 0x3d
4 __SREG__ = 0x3f
5 __RAMPZ__ = 0x3b
6 __tmp_reg__ = 0
7 __zero_reg__ = 1
8 .text
9 .Ltext0:
10 .cfi_sections .debug_frame
11 .global check_dip_switches
13 check_dip_switches:
14 .LFB11:
15 .file 1 "src/main.c"
1:src/main.c **** //#define F_CPU 16000000L
2:src/main.c ****
3:src/main.c **** #include <avr/io.h>
4:src/main.c **** #include <util/delay.h>
5:src/main.c **** #include <avr/interrupt.h> //interrupts
6:src/main.c **** #include <stdlib.h>
7:src/main.c **** #include "pinout.h"
8:src/main.c **** #include "print.h"
9:src/main.c **** #include "adc.h"
10:src/main.c **** #include "uart.h"
11:src/main.c **** #include "i2c.h"
12:src/main.c **** #include "DS3231.h"
13:src/main.c ****
14:src/main.c ****
15:src/main.c **** /*README
16:src/main.c **** DIP1 aktiviert Röhren-Schaltregler
17:src/main.c **** */
18:src/main.c ****
19:src/main.c **** volatile int counter = 0;
20:src/main.c **** char text[22] = {'F','R','o','h','e',' ',' ','W','e','i','h','n','a','c','h','t','e', 'n', ' ',' ',
21:src/main.c **** //char text[18] = {'1','2','3','4','5','6','7','8','9','t','s','c','a','f','e',' ', ' ', ' '};
22:src/main.c **** int offset = 0;
23:src/main.c **** int animationtimer = 0;
24:src/main.c **** int stringlength = 22;
25:src/main.c **** int duty = 125;
26:src/main.c ****
27:src/main.c ****
28:src/main.c **** void check_dip_switches(void);
29:src/main.c **** void check_buttons(void);
30:src/main.c **** void setup(void);
31:src/main.c **** void set_PWM_duty(int dutycycle);
32:src/main.c ****
33:src/main.c **** int main(void){
34:src/main.c **** setup();
35:src/main.c ****
36:src/main.c **** while(1){
37:src/main.c **** //putchar('c');
38:src/main.c **** //_delay_ms(50);
39:src/main.c ****
40:src/main.c **** check_dip_switches();
41:src/main.c **** check_buttons();
42:src/main.c ****
43:src/main.c ****
44:src/main.c ****
45:src/main.c **** char current_section[6];
46:src/main.c **** for(int i = 0; i < 6; i++){
47:src/main.c **** current_section[i] = text[(i+offset)%stringlength];
48:src/main.c **** if(text[(i+offset)%stringlength] == ' ' && text[(i+1+offset)%stringlength] == ' '){
49:src/main.c **** PORTC |= DOT;
50:src/main.c **** }else{
51:src/main.c **** PORTC &= ~DOT;
52:src/main.c **** }
53:src/main.c **** }
54:src/main.c ****
55:src/main.c ****
56:src/main.c ****
57:src/main.c **** //for(int i = 0; i < 6; i++){}
58:src/main.c **** //char test_word[6] = {'0','0','0','0','0', (char)i};
59:src/main.c **** print_String(current_section);
60:src/main.c **** //i2c_start(0b00101010);
61:src/main.c **** // current_e
62:src/main.c ****
63:src/main.c ****
64:src/main.c ****
65:src/main.c **** /*
66:src/main.c **** for(int i = 0; i < 6; i++)
67:src/main.c **** SR_Buffer[i] = i;
68:src/main.c ****
69:src/main.c **** print_SR_Buffer();
70:src/main.c **** */
71:src/main.c **** //putchar((i2c_start(0x68))+48);
72:src/main.c **** //i2c_write(0b00101010);
73:src/main.c **** }
74:src/main.c **** }
75:src/main.c ****
76:src/main.c **** void check_dip_switches() {
16 .loc 1 76 0
17 .cfi_startproc
18 /* prologue: function */
19 /* frame size = 0 */
20 /* stack size = 0 */
21 .L__stack_usage = 0
77:src/main.c **** if (PINB & DIP_1) {
22 .loc 1 77 0
23 0000 1A9B sbis 0x3,2
24 0002 00C0 rjmp .L2
78:src/main.c **** PORTC |= ENABLE_TUBE_PSU;
25 .loc 1 78 0
26 0004 479A sbi 0x8,7
79:src/main.c **** PORTA &= ~ENABLE_TUBE_SUPPLY;
27 .loc 1 79 0
28 0006 82B1 in r24,0x2
29 0008 8C7F andi r24,lo8(-4)
30 000a 82B9 out 0x2,r24
31 000c 0895 ret
32 .L2:
80:src/main.c **** // PORTB |= STATUS_LED_B;
81:src/main.c **** } else {
82:src/main.c **** PORTC &= ~(ENABLE_TUBE_PSU);
33 .loc 1 82 0
34 000e 4798 cbi 0x8,7
83:src/main.c **** PORTA |= (ENABLE_TUBE_SUPPLY);
35 .loc 1 83 0
36 0010 119A sbi 0x2,1
37 0012 0895 ret
38 .cfi_endproc
39 .LFE11:
41 .global check_buttons
43 check_buttons:
44 .LFB12:
84:src/main.c **** // PORTB &= ~STATUS_LED_B;
85:src/main.c **** }
86:src/main.c **** }
87:src/main.c ****
88:src/main.c **** void check_buttons(){
45 .loc 1 88 0
46 .cfi_startproc
47 /* prologue: function */
48 /* frame size = 0 */
49 /* stack size = 0 */
50 .L__stack_usage = 0
89:src/main.c **** if((PINC & BUTTON_A)){
51 .loc 1 89 0
52 0014 86B1 in r24,0x6
53 0016 0895 ret
54 .cfi_endproc
55 .LFE12:
57 .global setup
59 setup:
60 .LFB13:
90:src/main.c **** // PORTB &= ~STATUS_LED_C;
91:src/main.c **** }
92:src/main.c **** };
93:src/main.c ****
94:src/main.c **** void setup(){
61 .loc 1 94 0
62 .cfi_startproc
63 /* prologue: function */
64 /* frame size = 0 */
65 /* stack size = 0 */
66 .L__stack_usage = 0
95:src/main.c ****
96:src/main.c **** DDRA = ENABLE_TUBE_SUPPLY;
67 .loc 1 96 0
68 0018 82E0 ldi r24,lo8(2)
69 001a 81B9 out 0x1,r24
97:src/main.c ****
98:src/main.c **** DDRB = STATUS_LED_B
70 .loc 1 98 0
71 001c 83EA ldi r24,lo8(-93)
72 001e 84B9 out 0x4,r24
99:src/main.c **** | STATUS_LED_C
100:src/main.c **** | MOSI
101:src/main.c **** | CLK;
102:src/main.c ****
103:src/main.c **** DDRC = LATCH_SR
73 .loc 1 103 0
74 0020 8CE9 ldi r24,lo8(-100)
75 0022 87B9 out 0x7,r24
104:src/main.c **** | ENABLE_SR
105:src/main.c **** | DOT
106:src/main.c **** | ENABLE_TUBE_PSU;
107:src/main.c ****
108:src/main.c **** DDRD = RESET_SR
76 .loc 1 108 0
77 0024 80EA ldi r24,lo8(-96)
78 0026 8AB9 out 0xa,r24
109:src/main.c **** | TUBE_LED;
110:src/main.c ****
111:src/main.c ****
112:src/main.c **** //--------------------------
113:src/main.c **** // SPI
114:src/main.c **** //--------------------------
115:src/main.c **** SPCR = (1 << SPE) | //enable SPI
79 .loc 1 115 0
80 0028 83E5 ldi r24,lo8(83)
81 002a 8CBD out 0x2c,r24
116:src/main.c **** (1 << MSTR) | //SPI als Master starten
117:src/main.c **** (1 << SPR0) | //clock-prescaler LSB
118:src/main.c **** (1 << SPR1) | //clock-prescaler MSB
119:src/main.c **** (0 << SPIE) | //complete transfer/ recive interrupt
120:src/main.c **** (0 << CPOL) |
121:src/main.c **** (0 << CPHA) |
122:src/main.c **** (0 << DORD); //MSB first = 0
123:src/main.c **** SPSR = (1 << SPI2X);// | //clock- prescaler double speed
82 .loc 1 123 0
83 002c 81E0 ldi r24,lo8(1)
84 002e 8DBD out 0x2d,r24
124:src/main.c ****
125:src/main.c **** PORTC &= ~LATCH_SR; //latch low, sonst startet SPI nicht
85 .loc 1 125 0
86 0030 88B1 in r24,0x8
87 0032 887F andi r24,lo8(-8)
88 0034 88B9 out 0x8,r24
126:src/main.c **** PORTC |= LATCH_SR;
89 .loc 1 126 0
90 0036 429A sbi 0x8,2
127:src/main.c **** PORTD |= RESET_SR; //Setzte Reset auf HIGH (active LOW)
91 .loc 1 127 0
92 0038 5D9A sbi 0xb,5
128:src/main.c **** PORTC &= ~(ENABLE_SR); //Aktiviert Shiftregister (active LOW)
93 .loc 1 128 0
94 003a 4398 cbi 0x8,3
129:src/main.c ****
130:src/main.c ****
131:src/main.c ****
132:src/main.c **** //--------------------------
133:src/main.c **** // Externe Interrupts
134:src/main.c **** //--------------------------
135:src/main.c **** //External Interrupt Mask Register
136:src/main.c ****
137:src/main.c **** EIMSK |= (1 << INT0) | //Aktiviere Interrupt INT0
95 .loc 1 137 0
96 003c 8DB3 in r24,0x1d
97 003e 8360 ori r24,lo8(3)
98 0040 8DBB out 0x1d,r24
138:src/main.c **** (1 << INT1); //Aktiviere Interrupt INT1
139:src/main.c ****
140:src/main.c **** //External Interrupt Control Register A
141:src/main.c **** EICRA |= (0 << ISC10) | //Interrupt bei jedem Pegelwechsel auf INT1
99 .loc 1 141 0
100 0042 E9E6 ldi r30,lo8(105)
101 0044 F0E0 ldi r31,0
102 0046 8081 ld r24,Z
103 0048 8B60 ori r24,lo8(11)
104 004a 8083 st Z,r24
142:src/main.c **** (1 << ISC11) |
143:src/main.c **** (1 << ISC00) | //Interrupt bei jedem Pegelwechsel auf INT0
144:src/main.c **** (1 << ISC01);
145:src/main.c **** //Pin Change Interrupt Control Register
146:src/main.c **** PCICR |= (1 << PCIE2); //Enabled PCINT16-23 als mögliche Signalquelle für Interrupt
105 .loc 1 146 0
106 004c E8E6 ldi r30,lo8(104)
107 004e F0E0 ldi r31,0
108 0050 8081 ld r24,Z
109 0052 8460 ori r24,lo8(4)
110 0054 8083 st Z,r24
147:src/main.c ****
148:src/main.c **** //Pin Change Mask Register 2
149:src/main.c **** //PCMSK2 |= (1 << PCINT18) | //PCINT18 als Signalquelle wählen
150:src/main.c **** // (1 << PCINT19); //PCINT19 als Signalquelle wählen
151:src/main.c ****
152:src/main.c ****
153:src/main.c **** //--------------------------
154:src/main.c **** // Timer + Zeitinterrupts
155:src/main.c **** //--------------------------
156:src/main.c ****
157:src/main.c **** //PWM-Timer
158:src/main.c **** //OC2A set when upcounting, clear when down counting
159:src/main.c **** TCCR2A = (1<<COM1A1)
111 .loc 1 159 0
112 0056 80E8 ldi r24,lo8(-128)
113 0058 8093 B000 sts 176,r24
160:src/main.c **** | (0<<COM1A0);
161:src/main.c ****
162:src/main.c **** TCCR2B=(1<<WGM20) //Wave form generartion mode
114 .loc 1 162 0
115 005c 83E8 ldi r24,lo8(-125)
116 005e 8093 B100 sts 177,r24
163:src/main.c **** |(1<<WGM21) // Wave form generation mode
164:src/main.c **** |(1<<COM2A1); //Compare Output Mode
165:src/main.c ****
166:src/main.c **** OCR2A = duty; // Compare value 125
117 .loc 1 166 0
118 0062 8091 0000 lds r24,duty
119 0066 8093 B300 sts 179,r24
167:src/main.c ****
168:src/main.c ****
169:src/main.c ****
170:src/main.c ****
171:src/main.c ****
172:src/main.c ****
173:src/main.c **** //Timer/Counter control Register A&B
174:src/main.c **** //set normal-Mode and waveform
175:src/main.c **** TCCR1A = (0 << WGM01) |
120 .loc 1 175 0
121 006a 1092 8000 sts 128,__zero_reg__
176:src/main.c **** (0 << WGM00);
177:src/main.c **** TCCR1B = (0 << WGM02);
122 .loc 1 177 0
123 006e E1E8 ldi r30,lo8(-127)
124 0070 F0E0 ldi r31,0
125 0072 1082 st Z,__zero_reg__
178:src/main.c ****
179:src/main.c ****
180:src/main.c **** //Prescaler von 1024
181:src/main.c **** TCCR1B |= (1 << CS02) |
126 .loc 1 181 0
127 0074 8081 ld r24,Z
128 0076 8560 ori r24,lo8(5)
129 0078 8083 st Z,r24
182:src/main.c **** (0 << CS01) |
183:src/main.c **** (1 << CS00) ;
184:src/main.c ****
185:src/main.c ****
186:src/main.c **** //Output compare Regsiter (Setzt Zeit bei der Interrupt auslösen soll)
187:src/main.c **** OCR1A = (1 << 7) | //MSB
130 .loc 1 187 0
131 007a 8FEF ldi r24,lo8(-1)
132 007c 90E0 ldi r25,0
133 007e 9093 8900 sts 136+1,r25
134 0082 8093 8800 sts 136,r24
188:src/main.c **** (1 << 6) |
189:src/main.c **** (1 << 5) |
190:src/main.c **** (1 << 4) |
191:src/main.c **** (1 << 3) |
192:src/main.c **** (1 << 2) |
193:src/main.c **** (1 << 1) |
194:src/main.c **** (1 << 0) ; //LSB
195:src/main.c ****
196:src/main.c **** //TIMSK1 |= (1 << OCIE0A); //Interruptvector hinzufügen
197:src/main.c **** TIMSK1 |= (1 << ICIE1) | //Interrupt Counter Enabled)
135 .loc 1 197 0
136 0086 EFE6 ldi r30,lo8(111)
137 0088 F0E0 ldi r31,0
138 008a 8081 ld r24,Z
139 008c 8162 ori r24,lo8(33)
140 008e 8083 st Z,r24
198:src/main.c **** (1 << TOIE1); //Timer Overflow Enabled
199:src/main.c ****
200:src/main.c ****
201:src/main.c **** sei(); //Enable Interrupts
141 .loc 1 201 0
142 /* #APP */
143 ; 201 "src/main.c" 1
144 0090 7894 sei
145 ; 0 "" 2
202:src/main.c **** //adc_setup();
203:src/main.c **** //i2c_init();
204:src/main.c **** //USART_Init(MYUBRR);
205:src/main.c **** clear_SR_Buffer();
146 .loc 1 205 0
147 /* #NOAPP */
148 0092 0C94 0000 jmp clear_SR_Buffer
149 .LVL0:
150 .cfi_endproc
151 .LFE13:
153 .section .text.startup,"ax",@progbits
154 .global main
156 main:
157 .LFB10:
33:src/main.c **** int main(void){
158 .loc 1 33 0
159 .cfi_startproc
160 0000 CF93 push r28
161 .LCFI0:
162 .cfi_def_cfa_offset 3
163 .cfi_offset 28, -2
164 0002 DF93 push r29
165 .LCFI1:
166 .cfi_def_cfa_offset 4
167 .cfi_offset 29, -3
168 0004 00D0 rcall .
169 0006 00D0 rcall .
170 0008 00D0 rcall .
171 .LCFI2:
172 .cfi_def_cfa_offset 10
173 000a CDB7 in r28,__SP_L__
174 000c DEB7 in r29,__SP_H__
175 .LCFI3:
176 .cfi_def_cfa_register 28
177 /* prologue: function */
178 /* frame size = 6 */
179 /* stack size = 8 */
180 .L__stack_usage = 8
34:src/main.c **** setup();
181 .loc 1 34 0
182 000e 0E94 0000 call setup
183 .LVL1:
184 .L12:
185 .LBB6:
40:src/main.c **** check_dip_switches();
186 .loc 1 40 0
187 0012 0E94 0000 call check_dip_switches
188 .LVL2:
189 .LBB7:
190 .LBB8:
89:src/main.c **** if((PINC & BUTTON_A)){
191 .loc 1 89 0
192 0016 86B1 in r24,0x6
193 .LVL3:
194 0018 FE01 movw r30,r28
195 001a 3196 adiw r30,1
196 001c 20E0 ldi r18,0
197 001e 30E0 ldi r19,0
198 .LVL4:
199 .L11:
200 .LBE8:
201 .LBE7:
202 .LBB9:
47:src/main.c **** current_section[i] = text[(i+offset)%stringlength];
203 .loc 1 47 0
204 0020 E090 0000 lds r14,offset
205 0024 F090 0000 lds r15,offset+1
206 0028 0091 0000 lds r16,stringlength
207 002c 1091 0000 lds r17,stringlength+1
208 0030 C901 movw r24,r18
209 0032 8E0D add r24,r14
210 0034 9F1D adc r25,r15
211 0036 B801 movw r22,r16
212 0038 0E94 0000 call __divmodhi4
213 003c 8050 subi r24,lo8(-(text))
214 003e 9040 sbci r25,hi8(-(text))
215 0040 DC01 movw r26,r24
216 0042 8C91 ld r24,X
217 0044 8193 st Z+,r24
218 0046 2F5F subi r18,-1
219 0048 3F4F sbci r19,-1
220 .LVL5:
48:src/main.c **** if(text[(i+offset)%stringlength] == ' ' && text[(i+1+offset)%stringlength] == ' '){
221 .loc 1 48 0
222 004a 8032 cpi r24,lo8(32)
223 004c 01F4 brne .L8
48:src/main.c **** if(text[(i+offset)%stringlength] == ' ' && text[(i+1+offset)%stringlength] == ' '){
224 .loc 1 48 0 is_stmt 0 discriminator 1
225 004e C901 movw r24,r18
226 0050 8E0D add r24,r14
227 0052 9F1D adc r25,r15
228 0054 B801 movw r22,r16
229 0056 0E94 0000 call __divmodhi4
230 005a 8050 subi r24,lo8(-(text))
231 005c 9040 sbci r25,hi8(-(text))
232 005e DC01 movw r26,r24
233 0060 8C91 ld r24,X
234 0062 8032 cpi r24,lo8(32)
235 0064 01F4 brne .L8
49:src/main.c **** PORTC |= DOT;
236 .loc 1 49 0 is_stmt 1
237 0066 449A sbi 0x8,4
238 0068 00C0 rjmp .L9
239 .L8:
51:src/main.c **** PORTC &= ~DOT;
240 .loc 1 51 0
241 006a 88B1 in r24,0x8
242 006c 807E andi r24,lo8(-32)
243 006e 88B9 out 0x8,r24
244 .L9:
245 .LVL6:
46:src/main.c **** for(int i = 0; i < 6; i++){
246 .loc 1 46 0
247 0070 2630 cpi r18,6
248 0072 3105 cpc r19,__zero_reg__
249 0074 01F4 brne .L11
250 .LBE9:
59:src/main.c **** print_String(current_section);
251 .loc 1 59 0
252 0076 CE01 movw r24,r28
253 0078 0196 adiw r24,1
254 007a 0E94 0000 call print_String
255 .LVL7:
256 .LBE6:
73:src/main.c **** }
257 .loc 1 73 0
258 007e 00C0 rjmp .L12
259 .cfi_endproc
260 .LFE10:
262 .text
263 .global __vector_15
265 __vector_15:
266 .LFB14:
206:src/main.c ****
207:src/main.c ****
208:src/main.c ****
209:src/main.c **** }
210:src/main.c **** //Timer 1 Interrupt
211:src/main.c **** ISR (TIMER1_OVF_vect) // Timer1 ISR
212:src/main.c **** {
267 .loc 1 212 0
268 .cfi_startproc
269 0096 1F92 push r1
270 .LCFI4:
271 .cfi_def_cfa_offset 3
272 .cfi_offset 1, -2
273 0098 0F92 push r0
274 .LCFI5:
275 .cfi_def_cfa_offset 4
276 .cfi_offset 0, -3
277 009a 0FB6 in r0,__SREG__
278 009c 0F92 push r0
279 009e 1124 clr __zero_reg__
280 00a0 8F93 push r24
281 .LCFI6:
282 .cfi_def_cfa_offset 5
283 .cfi_offset 24, -4
284 00a2 9F93 push r25
285 .LCFI7:
286 .cfi_def_cfa_offset 6
287 .cfi_offset 25, -5
288 /* prologue: Signal */
289 /* frame size = 0 */
290 /* stack size = 5 */
291 .L__stack_usage = 5
213:src/main.c **** //PORTD ^=TUBE_LED;
214:src/main.c **** PORTB ^=STATUS_LED_C;
292 .loc 1 214 0
293 00a4 85B1 in r24,0x5
294 00a6 92E0 ldi r25,lo8(2)
295 00a8 8927 eor r24,r25
296 00aa 85B9 out 0x5,r24
215:src/main.c **** TCNT1 = 63974; //63974; // for 1 sec at 16 MHz
297 .loc 1 215 0
298 00ac 86EE ldi r24,lo8(-26)
299 00ae 99EF ldi r25,lo8(-7)
300 00b0 9093 8500 sts 132+1,r25
301 00b4 8093 8400 sts 132,r24
216:src/main.c **** animationtimer ++;
302 .loc 1 216 0
303 00b8 8091 0000 lds r24,animationtimer
304 00bc 9091 0000 lds r25,animationtimer+1
305 00c0 0196 adiw r24,1
306 00c2 9093 0000 sts animationtimer+1,r25
307 00c6 8093 0000 sts animationtimer,r24
217:src/main.c **** if(animationtimer > 10){
308 .loc 1 217 0
309 00ca 0B97 sbiw r24,11
310 00cc 04F0 brlt .L13
218:src/main.c **** animationtimer= 0;
311 .loc 1 218 0
312 00ce 1092 0000 sts animationtimer+1,__zero_reg__
313 00d2 1092 0000 sts animationtimer,__zero_reg__
219:src/main.c **** offset++;
314 .loc 1 219 0
315 00d6 8091 0000 lds r24,offset
316 00da 9091 0000 lds r25,offset+1
317 00de 0196 adiw r24,1
318 00e0 9093 0000 sts offset+1,r25
319 00e4 8093 0000 sts offset,r24
220:src/main.c **** PORTB ^= STATUS_LED_B;
320 .loc 1 220 0
321 00e8 85B1 in r24,0x5
322 00ea 91E0 ldi r25,lo8(1)
323 00ec 8927 eor r24,r25
324 00ee 85B9 out 0x5,r24
221:src/main.c **** if(offset > 15){
325 .loc 1 221 0
326 00f0 8091 0000 lds r24,offset
327 00f4 9091 0000 lds r25,offset+1
328 00f8 4097 sbiw r24,16
329 00fa 04F0 brlt .L13
222:src/main.c **** offset = 0;
330 .loc 1 222 0
331 00fc 1092 0000 sts offset+1,__zero_reg__
332 0100 1092 0000 sts offset,__zero_reg__
333 .L13:
334 /* epilogue start */
223:src/main.c **** }
224:src/main.c **** }
225:src/main.c **** }
335 .loc 1 225 0
336 0104 9F91 pop r25
337 0106 8F91 pop r24
338 0108 0F90 pop r0
339 010a 0FBE out __SREG__,r0
340 010c 0F90 pop r0
341 010e 1F90 pop r1
342 0110 1895 reti
343 .cfi_endproc
344 .LFE14:
346 .global __vector_1
348 __vector_1:
349 .LFB15:
226:src/main.c ****
227:src/main.c **** //Encoder rotate
228:src/main.c **** ISR(INT0_vect) {
350 .loc 1 228 0
351 .cfi_startproc
352 0112 1F92 push r1
353 .LCFI8:
354 .cfi_def_cfa_offset 3
355 .cfi_offset 1, -2
356 0114 0F92 push r0
357 .LCFI9:
358 .cfi_def_cfa_offset 4
359 .cfi_offset 0, -3
360 0116 0FB6 in r0,__SREG__
361 0118 0F92 push r0
362 011a 1124 clr __zero_reg__
363 011c 8F93 push r24
364 .LCFI10:
365 .cfi_def_cfa_offset 5
366 .cfi_offset 24, -4
367 /* prologue: Signal */
368 /* frame size = 0 */
369 /* stack size = 4 */
370 .L__stack_usage = 4
229:src/main.c **** if (PIND & ENCODER_B) {
371 .loc 1 229 0
372 011e 89B1 in r24,0x9
373 /* epilogue start */
230:src/main.c **** // set_PWM_duty(duty--);
231:src/main.c **** } else {
232:src/main.c **** // set_PWM_duty(duty++);
233:src/main.c **** }
234:src/main.c **** }
374 .loc 1 234 0
375 0120 8F91 pop r24
376 0122 0F90 pop r0
377 0124 0FBE out __SREG__,r0
378 0126 0F90 pop r0
379 0128 1F90 pop r1
380 012a 1895 reti
381 .cfi_endproc
382 .LFE15:
384 .global __vector_2
386 __vector_2:
387 .LFB16:
235:src/main.c ****
236:src/main.c **** //Encoder Button
237:src/main.c **** ISR(INT1_vect) {
388 .loc 1 237 0
389 .cfi_startproc
390 012c 1F92 push r1
391 .LCFI11:
392 .cfi_def_cfa_offset 3
393 .cfi_offset 1, -2
394 012e 0F92 push r0
395 .LCFI12:
396 .cfi_def_cfa_offset 4
397 .cfi_offset 0, -3
398 0130 0FB6 in r0,__SREG__
399 0132 0F92 push r0
400 0134 1124 clr __zero_reg__
401 /* prologue: Signal */
402 /* frame size = 0 */
403 /* stack size = 3 */
404 .L__stack_usage = 3
405 /* epilogue start */
238:src/main.c ****
239:src/main.c **** }
406 .loc 1 239 0
407 0136 0F90 pop r0
408 0138 0FBE out __SREG__,r0
409 013a 0F90 pop r0
410 013c 1F90 pop r1
411 013e 1895 reti
412 .cfi_endproc
413 .LFE16:
415 .global __vector_20
417 __vector_20:
418 .LFB17:
240:src/main.c ****
241:src/main.c ****
242:src/main.c **** ISR (USART0_RX_vect){
419 .loc 1 242 0
420 .cfi_startproc
421 0140 1F92 push r1
422 .LCFI13:
423 .cfi_def_cfa_offset 3
424 .cfi_offset 1, -2
425 0142 0F92 push r0
426 .LCFI14:
427 .cfi_def_cfa_offset 4
428 .cfi_offset 0, -3
429 0144 0FB6 in r0,__SREG__
430 0146 0F92 push r0
431 0148 1124 clr __zero_reg__
432 /* prologue: Signal */
433 /* frame size = 0 */
434 /* stack size = 3 */
435 .L__stack_usage = 3
436 /* epilogue start */
243:src/main.c **** /*
244:src/main.c **** //while ( !(UCSR0A & (1<<RXC0)) ){}; //RXC = Recive complete
245:src/main.c **** char uart_Buffer[500];
246:src/main.c **** char time_string[6];
247:src/main.c **** char sat_string[2];
248:src/main.c **** sat_string[0]='1';
249:src/main.c **** sat_string[1]= '1';
250:src/main.c ****
251:src/main.c **** for(int k = 0; k < 6; k++){
252:src/main.c **** time_string[k] = '8';
253:src/main.c **** }
254:src/main.c **** int i = 0;
255:src/main.c ****
256:src/main.c **** while(UDR0 != '\r' && i < 500){
257:src/main.c **** uart_Buffer[i] = UDR0;
258:src/main.c **** i++;
259:src/main.c **** PORTB ^=STATUS_LED_B;
260:src/main.c ****
261:src/main.c ****
262:src/main.c **** }
263:src/main.c ****
264:src/main.c **** for(int j = 0; j < 500; j++){
265:src/main.c ****
266:src/main.c **** //if(uart_Buffer[j] == '$'){
267:src/main.c **** if(uart_Buffer[j+1] == 'G'){
268:src/main.c **** if(uart_Buffer[j+2] == 'P'){
269:src/main.c **** if(uart_Buffer[j+3] == 'Z'){
270:src/main.c **** if(uart_Buffer[j+4] == 'D'){
271:src/main.c **** if(uart_Buffer[j+5] == 'A'){
272:src/main.c **** //j++;
273:src/main.c ****
274:src/main.c **** sat_string[0] = uart_Buffer[1];
275:src/main.c **** sat_string[1] = uart_Buffer[100];
276:src/main.c ****
277:src/main.c **** //time_string[0] = uart_Buffer[j+36];
278:src/main.c **** //time_string[1] = uart_Buffer[j+37];
279:src/main.c **** //time_string[2] = uart_Buffer[j+8];
280:src/main.c **** //time_string[3] = uart_Buffer[j+9];
281:src/main.c **** //time_string[5] = uart_Buffer[j+10];
282:src/main.c **** //time_string[6] = uart_Buffer[j+11];
283:src/main.c **** }
284:src/main.c **** }
285:src/main.c **** }
286:src/main.c **** }
287:src/main.c **** }
288:src/main.c **** // }
289:src/main.c ****
290:src/main.c **** }
291:src/main.c ****
292:src/main.c ****
293:src/main.c **** print_String(sat_string);
294:src/main.c ****
295:src/main.c **** */
296:src/main.c **** }
437 .loc 1 296 0
438 014a 0F90 pop r0
439 014c 0FBE out __SREG__,r0
440 014e 0F90 pop r0
441 0150 1F90 pop r1
442 0152 1895 reti
443 .cfi_endproc
444 .LFE17:
446 .global set_PWM_duty
448 set_PWM_duty:
449 .LFB18:
297:src/main.c ****
298:src/main.c **** void set_PWM_duty(int dutycycle){
450 .loc 1 298 0
451 .cfi_startproc
452 .LVL8:
453 /* prologue: function */
454 /* frame size = 0 */
455 /* stack size = 0 */
456 .L__stack_usage = 0
299:src/main.c **** OCR2A = dutycycle;
457 .loc 1 299 0
458 0154 8093 B300 sts 179,r24
459 0158 0895 ret
460 .cfi_endproc
461 .LFE18:
463 .global duty
464 .data
467 duty:
468 0000 7D00 .word 125
469 .global stringlength
472 stringlength:
473 0002 1600 .word 22
474 .global animationtimer
475 .section .bss
478 animationtimer:
479 0000 0000 .zero 2
480 .global offset
483 offset:
484 0002 0000 .zero 2
485 .global text
486 .data
489 text:
490 0004 46 .byte 70
491 0005 52 .byte 82
492 0006 6F .byte 111
493 0007 68 .byte 104
494 0008 65 .byte 101
495 0009 20 .byte 32
496 000a 20 .byte 32
497 000b 57 .byte 87
498 000c 65 .byte 101
499 000d 69 .byte 105
500 000e 68 .byte 104
501 000f 6E .byte 110
502 0010 61 .byte 97
503 0011 63 .byte 99
504 0012 68 .byte 104
505 0013 74 .byte 116
506 0014 65 .byte 101
507 0015 6E .byte 110
508 0016 20 .byte 32
509 0017 20 .byte 32
510 0018 20 .byte 32
511 0019 20 .byte 32
512 .global counter
513 .section .bss
516 counter:
517 0004 0000 .zero 2
518 .text
519 .Letext0:
520 .file 2 "/usr/local/CrossPack-AVR-20131216/avr/include/stdint.h"
521 .file 3 "inc/print.h"
DEFINED SYMBOLS
*ABS*:00000000 main.c
/var/folders/vp/mj8sv_kj3c1gtbdcbb9v8gb80000gn/T//ccBTFpTE.s:2 *ABS*:0000003e __SP_H__
/var/folders/vp/mj8sv_kj3c1gtbdcbb9v8gb80000gn/T//ccBTFpTE.s:3 *ABS*:0000003d __SP_L__
/var/folders/vp/mj8sv_kj3c1gtbdcbb9v8gb80000gn/T//ccBTFpTE.s:4 *ABS*:0000003f __SREG__
/var/folders/vp/mj8sv_kj3c1gtbdcbb9v8gb80000gn/T//ccBTFpTE.s:5 *ABS*:0000003b __RAMPZ__
/var/folders/vp/mj8sv_kj3c1gtbdcbb9v8gb80000gn/T//ccBTFpTE.s:6 *ABS*:00000000 __tmp_reg__
/var/folders/vp/mj8sv_kj3c1gtbdcbb9v8gb80000gn/T//ccBTFpTE.s:7 *ABS*:00000001 __zero_reg__
/var/folders/vp/mj8sv_kj3c1gtbdcbb9v8gb80000gn/T//ccBTFpTE.s:13 .text:00000000 check_dip_switches
/var/folders/vp/mj8sv_kj3c1gtbdcbb9v8gb80000gn/T//ccBTFpTE.s:43 .text:00000014 check_buttons
/var/folders/vp/mj8sv_kj3c1gtbdcbb9v8gb80000gn/T//ccBTFpTE.s:59 .text:00000018 setup
/var/folders/vp/mj8sv_kj3c1gtbdcbb9v8gb80000gn/T//ccBTFpTE.s:467 .data:00000000 duty
/var/folders/vp/mj8sv_kj3c1gtbdcbb9v8gb80000gn/T//ccBTFpTE.s:156 .text.startup:00000000 main
/var/folders/vp/mj8sv_kj3c1gtbdcbb9v8gb80000gn/T//ccBTFpTE.s:483 .bss:00000002 offset
/var/folders/vp/mj8sv_kj3c1gtbdcbb9v8gb80000gn/T//ccBTFpTE.s:472 .data:00000002 stringlength
/var/folders/vp/mj8sv_kj3c1gtbdcbb9v8gb80000gn/T//ccBTFpTE.s:489 .data:00000004 text
/var/folders/vp/mj8sv_kj3c1gtbdcbb9v8gb80000gn/T//ccBTFpTE.s:265 .text:00000096 __vector_15
/var/folders/vp/mj8sv_kj3c1gtbdcbb9v8gb80000gn/T//ccBTFpTE.s:478 .bss:00000000 animationtimer
/var/folders/vp/mj8sv_kj3c1gtbdcbb9v8gb80000gn/T//ccBTFpTE.s:348 .text:00000112 __vector_1
/var/folders/vp/mj8sv_kj3c1gtbdcbb9v8gb80000gn/T//ccBTFpTE.s:386 .text:0000012c __vector_2
/var/folders/vp/mj8sv_kj3c1gtbdcbb9v8gb80000gn/T//ccBTFpTE.s:417 .text:00000140 __vector_20
/var/folders/vp/mj8sv_kj3c1gtbdcbb9v8gb80000gn/T//ccBTFpTE.s:448 .text:00000154 set_PWM_duty
/var/folders/vp/mj8sv_kj3c1gtbdcbb9v8gb80000gn/T//ccBTFpTE.s:516 .bss:00000004 counter
UNDEFINED SYMBOLS
clear_SR_Buffer
__divmodhi4
print_String
__do_copy_data
__do_clear_bss