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12 changed files with 159 additions and 831 deletions
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6
Inc/address_selector.h
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@ -1,6 +0,0 @@
#include <stdint.h>
void adress_selector_init_gpio();
uint8_t read_address();
extern uint8_t dmx_address;

29
Inc/stepper.h
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#include "stm32g0b1xx.h"
#include <stdint.h>
typedef struct {
GPIO_TypeDef* en_port;
uint8_t en_pin;
GPIO_TypeDef* dir_port;
uint8_t dir_pin;
GPIO_TypeDef* step_port;
uint8_t step_pin;
GPIO_TypeDef* home_port;
uint8_t home_pin;
uint8_t homed:1;
uint8_t trigger_step:1;
int32_t home_position;
int32_t pos;
int32_t endless_rot_integrator;
int32_t speed;
int32_t ramp_to_speed;
uint32_t next_step;
} stepper_T;
#define STEPPER_MAX_SPEED 400
#define STEPPER_STEPS_PER_ROTATION 3200*4
void Timer1_Init(void);
void stepper_gpio_init();
void do_steps();

9
Inc/uart_dmx.h
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#include "stm32g0b1xx.h"
#define BUFFER_SIZE 515
extern uint8_t rxBuffer[BUFFER_SIZE];
extern uint16_t rxBufferPos;
void init_UART1_it();
void init_UART1_dma();

13
Makefile
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@ -22,7 +22,7 @@ TARGET = Parafraktor
# debug build?
DEBUG = 1
# optimization
OPT = -O0
OPT = -Og
#######################################
@ -37,9 +37,6 @@ BUILD_DIR = build
# C sources
C_SOURCES = \
Src/main.c \
Src/uart_dmx.c \
Src/address_selector.c \
Src/stepper.c \
Src/stm32g0xx_it.c \
Src/stm32g0xx_hal_msp.c \
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim.c \
@ -62,7 +59,7 @@ Drivers/RTT/RTT/SEGGER_RTT.c \
Drivers/RTT/RTT/SEGGER_RTT_printf.c \
Drivers/RTT/Syscalls/SEGGER_RTT_Syscalls_GCC.c \
Drivers/SystemView/SYSVIEW/SEGGER_SYSVIEW.c \
Drivers/SystemView/Sample/NoOS/Config/Cortex-M0/SEGGER_SYSVIEW_Config_NoOS_CM0.c \
Drivers/SystemView/Sample/NoOS/Config/Cortex-M0/SEGGER_SYSVIEW_Config_NoOS_CM0.c\
Src/system_stm32g0xx.c
# ASM sources
@ -115,11 +112,7 @@ AS_DEFS =
# C defines
C_DEFS = \
-DUSE_HAL_DRIVER \
-DSTM32G0B1xx \
ifneq ($(DMX_ADDRESS),)
C_DEFS += -DDMX_ADDRESS=$(DMX_ADDRESS)
endif
-DSTM32G0B1xx
# AS includes

89
README.md
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# Parafraktor
## Hardware Connections
- Motor1: P30 (M1)
- Motor2: P53 (M2)
- Motor3: P46 (M3A)
- Motor4: P70 (M4)
- Motor5: P31 (M5)
- Motor6: P71 (M7)
- 24V: Power + -
- TTL-level DMX: FWS
- Limit switches: EXP2 (optional)
- Address selector: EXP1 (optional)
- VM/VBB(?) Jumper must be set on every motor driver
## DMX Registers
Control Motors 1 - 6
| Offset | Motor | Function | Values | |
| ------- | ----- | ------------ | --------- | ------------------------------ |
| 1 | 1 | Tilt | 000 - 255 | 8bit Position values can be combined to 16bit value |
| 2 | 1 | Tilt fine | 000 - 255 | |
| 3 | 1 | Endless Tilt | 000 - 004 | No function |
| | | | 005 - 121 | Forward Rotation fast -> slow |
| | | | 122 - 132 | Stop |
| | | | 133 - 250 | Backward Rotation slow -> fast |
| | | | 251 - 255 | No function |
| ... | ... | ... | ... | ... |
| 16 | 6 | Tilt | | |
| 17 | 6 | Tilt fine | | |
| 18 | 6 | Endless Tilt | | |
## Compile, Flash & Debug
requirements:
- for compiling: arm-none-eabi-toolchain, gnu-make, git
- for flashing: SEGGER J-Link, JLinkGDBServer (other Debug Probes can be used, see Makefile)
run gdb-server<br />
`./gdb.sh`
build and flash firmware with static DMX-Address<br />
`make program DMX_ADDRESS=99`
build and flash firmware with address selector on EXP1<br />
`make program`
open serial RTT prints:<br />
`telnet localhost 9000`
open cgdb debugger:<br />
`./debug.sh`
## non-obvious PinOuts
### DMX/UART/FWS
| Pin # | connect to RS485 Transceiver
| - | ----------|
| 1 | NC |
| 2 | DATA-in |
| 3 | GND |
| 4 | 5V (only connect if not powered by other board) |
### Limit Switches/EXP2
|Pin #| Switch |Pin #| Switch |
| --- | ----------| --- | ----------|
| 1 | M1 (PB14) | 2 | M2 (PB13) |
| 3 | M3 (PF7) | 4 | M4 (PB12) |
| 5 | M5 (PE7) | 6 | M6 (PB11) |
| 7 | | 8 | |
| 9 | GND | 10 | |
### Address Selector/EXP1
|Pin #| Switch |Pin #| Switch |
| --- | ----------| --- | ----------|
| 1 | | 2 | |
| 3 | | 4 | |
| 5 | | 6 | |
| 7 | | 8 | |
| 9 | GND | 10 | 5V |
## Hardware
- BIGTREETECH Manta M8P v1.1
- https://github.com/bigtreetech/Manta-M8P/tree/master/V1.0_V1.1/Hardware
- https://github.com/bigtreetech/Manta-M8P
- https://bttwiki.com/M8P.html#product-profile

53
Src/address_selector.c
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#include "stm32g0b1xx.h"
#include <stdio.h>
uint8_t dmx_address;
void adress_selector_init_gpio(){
RCC->IOPENR |= RCC_IOPENR_GPIOEEN;
RCC->IOPENR |= RCC_IOPENR_GPIOBEN;
GPIOE->MODER &= ~(0x3 << (9 * 2));
GPIOE->MODER &= ~(0x3 << (10 * 2));
GPIOE->MODER &= ~(0x3 << (11 * 2));
GPIOE->MODER &= ~(0x3 << (12 * 2));
GPIOE->MODER &= ~(0x3 << (13 * 2));
GPIOE->MODER &= ~(0x3 << (14 * 2));
GPIOE->MODER &= ~(0x3 << (15 * 2));
GPIOB->MODER &= ~(0x3 << (10 * 2)); // B10
GPIOE->PUPDR &= ~(0x3 << (9 * 2));
GPIOE->PUPDR |= (0x1 << (9 * 2));
GPIOE->PUPDR &= ~(0x3 << (10 * 2));
GPIOE->PUPDR |= (0x1 << (10 * 2));
GPIOE->PUPDR &= ~(0x3 << (11 * 2));
GPIOE->PUPDR |= (0x1 << (11 * 2));
GPIOE->PUPDR &= ~(0x3 << (12 * 2));
GPIOE->PUPDR |= (0x1 << (12 * 2));
GPIOE->PUPDR |= (0x1 << (13 * 2));
GPIOE->PUPDR &= ~(0x3 << (13 * 2));
GPIOE->PUPDR |= (0x1 << (14 * 2));
GPIOE->PUPDR &= ~(0x3 << (14 * 2));
GPIOE->PUPDR |= (0x1 << (15 * 2));
GPIOE->PUPDR &= ~(0x3 << (15 * 2));
GPIOB->PUPDR &= ~(0x3 << (10 * 2)); // B10
GPIOB->PUPDR |= (0x1 << (10 * 2));
}
uint8_t read_address(){
#ifndef DMX_ADDRESS
uint16_t address = ((GPIOE->IDR >> 9)&0x7F) | (GPIOB->IDR & (1<<10))>>3;
printf("read address: %d = 0x%x\n", address, address);
#else
uint16_t address = DMX_ADDRESS;
printf("static address: %d\n", address);
#endif
return address;
}

175
Src/main.c
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@ -27,10 +27,6 @@
#include "stm32g0xx_hal_cortex.h"
#include <stdint.h>
#include <stdio.h>
#include "uart_dmx.h"
#include "stepper.h"
#include "address_selector.h"
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
@ -57,14 +53,157 @@
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
static void MX_GPIO_Init(void);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
#define BUFFER_SIZE 515
uint8_t rxBuffer[BUFFER_SIZE];
uint16_t rxBufferPos = 0;
void init_UART1_it(){
RCC->APBENR2 |= RCC_APBENR2_USART1EN;
RCC->IOPENR |= RCC_IOPENR_GPIOCEN;
GPIOC->MODER &= ~GPIO_MODER_MODE5; // Alternate function mode on RX pin
GPIOC->MODER |= GPIO_MODER_MODE5_1;
GPIOC->AFR[0] &= GPIO_AFRL_AFSEL5;
GPIOC->AFR[0] |= 1 << GPIO_AFRL_AFSEL5_Pos; // AF1 -> USART1 RX
USART1->BRR = 128; // 32000000÷250000
USART1->CR1 = USART_CR1_RE;
USART1->CR3 |= USART_CR3_EIE; // Interrupt on BREAK (and other errors)
USART1->CR1 |= USART_CR1_RXNEIE_RXFNEIE; // RX Interrupt
USART1->CR1 |= USART_CR1_UE;
HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(USART1_IRQn);
}
void init_UART1_dma(){
RCC->IOPENR |= RCC_IOPENR_GPIOCEN;
RCC->APBENR2 |= RCC_APBENR2_USART1EN;
RCC->AHBENR |= RCC_AHBENR_DMA1EN;
GPIOC->MODER &= ~GPIO_MODER_MODE5; // Alternate function mode on RX pin
GPIOC->MODER |= GPIO_MODER_MODE5_1;
GPIOC->AFR[0] &= GPIO_AFRL_AFSEL5;
GPIOC->AFR[0] |= 1 << GPIO_AFRL_AFSEL5_Pos; // AF1 -> USART1 RX
USART1->BRR = 256; // 64000000÷250000
USART1->CR1 = USART_CR1_RE;
USART1->CR3 |= USART_CR3_EIE; // Interrupt on BREAK (and other errors)
USART1->CR3 |= USART_CR3_DMAR; // DMA Receiver mode
DMA1_Channel1->CCR = (0x02 << DMA_CCR_PL_Pos) | DMA_CCR_MINC | DMA_CCR_TCIE;
DMA1_Channel1->CMAR = ( uint32_t )&rxBuffer[0];
DMA1_Channel1->CPAR = ( uint32_t )&(USART1->RDR);
DMA1_Channel1->CNDTR = 5;
DMAMUX1_Channel0->CCR &= ~( DMAMUX_CxCR_DMAREQ_ID );
DMAMUX1_Channel0->CCR |= ( 50 << DMAMUX_CxCR_DMAREQ_ID_Pos ); // 50 -> USART1 RX
USART1->CR1 |= USART_CR1_UE;
HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(USART1_IRQn);
HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
}
void Reset_DMA(void) {
// Disable the DMA channel
DMA1_Channel1->CCR &= ~DMA_CCR_EN; // Disable DMA Channel 1
// Clear the transfer complete flag
DMA1->IFCR |= DMA_IFCR_CTCIF1; // Clear transfer complete flag for Channel 1
// Reconfigure the DMA
DMA1_Channel1->CMAR = (uint32_t)rxBuffer; // Set memory address to the start of the buffer
DMA1_Channel1->CNDTR = BUFFER_SIZE; // Set number of data items to transfer
// Enable the DMA channel again
DMA1_Channel1->CCR |= DMA_CCR_EN; // Enable DMA Channel 1
}
void USART1_IRQHandler(){
SEGGER_SYSVIEW_RecordEnterISR();
if(USART1->ISR & USART_ISR_RXNE_RXFNE){
//SEGGER_SYSVIEW_PrintfHost("RXNE");
//printf("%x ", USART1->RDR);
rxBuffer[rxBufferPos++] = USART1->RDR;
if(rxBufferPos >= BUFFER_SIZE){
rxBufferPos = 0;
}
}
if(USART1->ISR & USART_ISR_FE){
//TODO read rx==0
USART1->ICR = USART_ICR_FECF;
//if(rxBufferPos != 514)
// printf("FE after %d\n",rxBufferPos);
//rxBufferPos = 0;
//DMA1_Channel1->CNDTR = 1;
SEGGER_SYSVIEW_PrintfHost("FE");
Reset_DMA();
//DMA1_Channel1->CCR &= ~( DMA_CCR_EN );
//DMA1_Channel1->CNDTR = 512;
//DMA1_Channel1->CMAR = ( uint32_t )&rxBuffer[0];
//DMA1_Channel1->CCR |= ( DMA_CCR_EN );
////DMA1_Channel1->CCR |= ( DMA_CCR_EN );
}
if(USART1->ISR & USART_ISR_ORE){
USART1->ICR = USART_ICR_ORECF;
//printf("ORE\n");
//SEGGER_SYSVIEW_PrintfHost("ORE");
}
if(USART1->ISR & USART_ISR_NE){
USART1->ICR = USART_ICR_NECF;
printf("NE\n");
}
if(USART1->ISR & USART_ISR_UDR){
USART1->ICR = USART_ICR_UDRCF;
printf("UDR\n");
}
SEGGER_SYSVIEW_RecordExitISR();
}
void DMA1_Channel1_IRQHandler(){
SEGGER_SYSVIEW_RecordEnterISR();
if(DMA1->ISR & DMA_ISR_TCIF1){
DMA1->IFCR = DMA_IFCR_CTCIF1;
}
SEGGER_SYSVIEW_PrintfHost("DMA");
SEGGER_SYSVIEW_RecordExitISR();
}
void init_stepper(){
RCC->IOPENR |= RCC_IOPENR_GPIOBEN;
RCC->IOPENR |= RCC_IOPENR_GPIOCEN;
RCC->IOPENR |= RCC_IOPENR_GPIOEEN;
// Set to output (00: Input, 01: Output, 10: Alternate function, 11: Analog)
// PB4 Direction
GPIOB->MODER &= ~(0x3 << (4 * 2)); // Clear mode bits for PB4
GPIOB->MODER |= (0x1 << (4 * 2)); // Set mode to output for PB4
// PC11 Enable
GPIOC->MODER &= ~(0x3 << (11 * 2)); // Clear mode bits for PC11
GPIOC->MODER |= (0x1 << (11 * 2)); // Set mode to output for PC11
// PE2 Step
GPIOE->MODER &= ~(0x3 << (2 * 2)); // Clear mode bits for PE2
GPIOE->MODER |= (0x1 << (2 * 2)); // Set mode to output for PE2
GPIOC->BSRR |= GPIO_BSRR_BS11;
}
/* USER CODE END 0 */
/**
@ -100,28 +239,24 @@ int main(void)
MX_GPIO_Init();
/* USER CODE BEGIN 2 */
init_UART1_dma();
stepper_gpio_init();
adress_selector_init_gpio();
dmx_address = read_address();
Timer1_Init();
init_stepper();
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
//uint16_t cnt = 0;
//HAL_UART_Receive_DMA(&huart1, rxBuffer, BUFFER_SIZE);
uint16_t cnt = 0;
while (1)
{
//printf("buf: ");
//for(uint16_t i=0; i<10; i++)
// printf("0x%02X ", rxBuffer[i]);
//printf("\n");
printf("buf: ");
for(uint16_t i=0; i<10; i++)
printf("0x%02X ", rxBuffer[i]);
printf("\n");
SEGGER_SYSVIEW_OnIdle();
//read_address();
//if(cnt++ >= 256-rxBuffer[1]){
// cnt = 0;
// GPIOE->ODR ^= GPIO_ODR_OD2;
//}
if(cnt++ >= 260-rxBuffer[1]){
cnt = 0;
GPIOE->ODR ^= GPIO_ODR_OD2;
}
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */

227
Src/stepper.c
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#include "stm32g0b1xx.h"
#include "stepper.h"
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include "SEGGER_SYSVIEW.h"
#include "uart_dmx.h"
#include "address_selector.h"
stepper_T steppers[] = {
{.en_port=GPIOC, .en_pin=11, .dir_port=GPIOB, .dir_pin=4, .step_port=GPIOE, .step_pin=2, .home_port=GPIOB, .home_pin=14, .home_position=0, .homed = 0},
{.en_port=GPIOB, .en_pin=3, .dir_port=GPIOF, .dir_pin=11, .step_port=GPIOF, .step_pin=12, .home_port=GPIOB, .home_pin=13, .home_position=0, .homed = 0},
{.en_port=GPIOF, .en_pin=10, .dir_port=GPIOD, .dir_pin=6, .step_port=GPIOD, .step_pin=7, .home_port=GPIOF, .home_pin=7, .home_position=0, .homed = 0},
{.en_port=GPIOD, .en_pin=5, .dir_port=GPIOD, .dir_pin=2, .step_port=GPIOD, .step_pin=3, .home_port=GPIOB, .home_pin=12, .home_position=0, .homed = 0},
{.en_port=GPIOD, .en_pin=1, .dir_port=GPIOC, .dir_pin=8, .step_port=GPIOC, .step_pin=9, .home_port=GPIOE, .home_pin=7, .home_position=0, .homed = 0},
{.en_port=GPIOD, .en_pin=15, .dir_port=GPIOD, .dir_pin=9, .step_port=GPIOD, .step_pin=11, .home_port=GPIOB, .home_pin=11, .home_position=0, .homed = 0},
//{.en_port=GPIOA, .en_pin=15, .dir_port=GPIOA, .dir_pin=14, .step_port=GPIOA, .step_pin=10, .home_port=GPIOB, .home_pin=11, .home_position=0, .homed = 1},
};
void set_pins(stepper_T* stp){
// Set direction (00: Input, 01: Output, 10: Alternate function, 11: Analog)
// enable
stp->en_port->MODER &= ~(0x3 << (stp->en_pin * 2));
stp->en_port->MODER |= (0x1 << (stp->en_pin * 2));
// direction
stp->dir_port->MODER &= ~(0x3 << (stp->dir_pin * 2));
stp->dir_port->MODER |= (0x1 << (stp->dir_pin * 2));
// step
stp->step_port->MODER &= ~(0x3 << (stp->step_pin * 2));
stp->step_port->MODER |= (0x1 << (stp->step_pin * 2));
// home switch
stp->home_port->MODER &= ~(0x3 << (stp->home_pin * 2));
stp->home_port->PUPDR &= ~(0x3 << (stp->home_pin * 2));
stp->home_port->PUPDR |= (0x1 << (stp->home_pin * 2));
// make shure stepper is enabled (active low)
stp->en_port->BSRR |= (0x1 << (stp->en_pin + 16));
}
void stepper_gpio_init(){
RCC->IOPENR |= RCC_IOPENR_GPIOAEN;
RCC->IOPENR |= RCC_IOPENR_GPIOBEN;
RCC->IOPENR |= RCC_IOPENR_GPIOCEN;
RCC->IOPENR |= RCC_IOPENR_GPIODEN;
RCC->IOPENR |= RCC_IOPENR_GPIOEEN;
RCC->IOPENR |= RCC_IOPENR_GPIOFEN;
for(uint8_t i=0; i<(sizeof(steppers)/sizeof(stepper_T)); i++){
set_pins(&steppers[i]);
}
}
void Timer1_Init(void) {
// Step 1: Enable the clock for Timer 1
RCC->APBENR2 |= RCC_APBENR2_TIM1EN; // Enable TIM1 clock
// Step 2: Configure Timer 1
TIM1->PSC = 64;
TIM1->ARR = 100;
TIM1->DIER |= TIM_DIER_UIE; // Enable update interrupt
// Step 3: Enable Timer 1
TIM1->CR1 |= TIM_CR1_CEN; // Enable the timer
// Step 4: Enable the interrupt in NVIC
NVIC_EnableIRQ(TIM1_BRK_UP_TRG_COM_IRQn); // Enable Timer 1 interrupt in NVIC
}
// Timer 1 Update Interrupt Handler
void TIM1_BRK_UP_TRG_COM_IRQHandler(void) {
SEGGER_SYSVIEW_RecordEnterISR();
if (TIM1->SR & TIM_SR_UIF) { // Check if the update interrupt flag is set
TIM1->SR &= ~TIM_SR_UIF; // Clear the update interrupt flag
//SEGGER_SYSVIEW_PrintfHost("do step");
do_steps();
}
SEGGER_SYSVIEW_RecordExitISR();
}
void do_steps(){
static uint32_t timer = 0;
int16_t rotation_speed = 0;
timer++;
for(uint8_t i=0; i<(sizeof(steppers)/sizeof(stepper_T)); i++){
if((steppers[i].ramp_to_speed != 0 && steppers[i].next_step == timer) || steppers[i].trigger_step){
/* reset trigger */
steppers[i].trigger_step = 0;
/* ramp speed */
if(steppers[i].speed < steppers[i].ramp_to_speed)
steppers[i].speed++;
if(steppers[i].speed > steppers[i].ramp_to_speed)
steppers[i].speed--;
/* limit max speed */
if(steppers[i].speed >= STEPPER_MAX_SPEED)
steppers[i].speed=STEPPER_MAX_SPEED;
if(steppers[i].speed <= -STEPPER_MAX_SPEED)
steppers[i].speed=-STEPPER_MAX_SPEED;
/* get direction from sign */
if(steppers[i].speed>0)
steppers[i].dir_port->BSRR |= 1 << steppers[i].dir_pin;
if(steppers[i].speed<0)
steppers[i].dir_port->BSRR |= 1 << (steppers[i].dir_pin + 16);
// avoid division by zero
if(steppers[i].speed != 0){
/* calculate next step time
*
* should be safe for 1 overflow; speeds which
* require longer wait times than uint32_max not supported
* */
steppers[i].next_step = timer + (1000/abs(steppers[i].speed));
/* step and count position */
steppers[i].step_port->ODR ^= 1 << steppers[i].step_pin;
if(steppers[i].speed>0)
steppers[i].pos++;
if(steppers[i].speed<0)
steppers[i].pos--;
}
else{
// dont send step at speed == 0
steppers[i].next_step = timer + 1;
}
//printf("motor[%d]: pos %ld\trot: %ld\tspeed %ld\n", i, steppers[i].pos, steppers[i].endless_rot_integrator, steppers[i].speed);
//printf("rotation speed: %d\n", rotation_speed);
}
if(steppers[i].homed){
static uint16_t old_ramp_to_speed;
old_ramp_to_speed = steppers[i].ramp_to_speed;
uint8_t raw_endless = rxBuffer[3*i + dmx_address + 2];
/* deadzone on top and bottom */
if(raw_endless >= 5 && raw_endless <= 250) {
rotation_speed = raw_endless - 127;
/* dead zone in the middle */
if(rotation_speed >= 5)
rotation_speed -= 5;
else if(rotation_speed <= -5)
rotation_speed += 5;
else
rotation_speed = 0;
}
else{
rotation_speed = 0;
}
if(steppers[i].pos == STEPPER_STEPS_PER_ROTATION+1){
steppers[i].pos = 1;
}
if(steppers[i].pos == -1){
steppers[i].pos = STEPPER_STEPS_PER_ROTATION-1;
}
///* handle endless rotation offset and wraparound */
//if(rotation_speed){
// steppers[i].endless_rot_integrator += rotation_speed;
// if(steppers[i].endless_rot_integrator >= STEPPER_STEPS_PER_ROTATION)
// {
// steppers[i].endless_rot_integrator -= STEPPER_STEPS_PER_ROTATION;
// steppers[i].pos -= STEPPER_STEPS_PER_ROTATION;
// }
// else if(steppers[i].endless_rot_integrator <= 0)
// {
// steppers[i].endless_rot_integrator += STEPPER_STEPS_PER_ROTATION;
// steppers[i].pos += STEPPER_STEPS_PER_ROTATION;
// }
//}
//else
// steppers[i].endless_rot_integrator = 0;
if(rotation_speed){
steppers[i].ramp_to_speed = rotation_speed;
}
else{
int32_t swapped_val = rxBuffer[3*i + dmx_address]<<8 | (rxBuffer[3*i+dmx_address+1]&0xFF);
//swapped_val += steppers[i].endless_rot_integrator;
int32_t scaled_steps = swapped_val * STEPPER_STEPS_PER_ROTATION / UINT16_MAX;
steppers[i].ramp_to_speed = scaled_steps - steppers[i].pos;
//static int cnt = 0;
//if(i==5 && ++cnt==10000){
// printf("swapped_val[%d]: %d\n", i, swapped_val);
// cnt=0;
//}
}
if(old_ramp_to_speed == 0 && steppers[i].ramp_to_speed != 0)
steppers[i].trigger_step = 1;
}
else{
if(~(steppers[i].home_port->IDR) & (1 << steppers[i].home_pin)){
steppers[i].pos = steppers[i].home_position;
steppers[i].homed = 1;
steppers[i].speed = 0;
steppers[i].ramp_to_speed = 0;
printf("homed %d\n", i);
}
else if(steppers[i].pos == 2*STEPPER_STEPS_PER_ROTATION){
steppers[i].pos = 0;
steppers[i].homed = 1;
steppers[i].speed = 0;
steppers[i].ramp_to_speed = 0;
printf("cant home %d, setting 0 now\n", i);
}
else{
if(steppers[i].ramp_to_speed == 0){
steppers[i].ramp_to_speed=80;
steppers[i].trigger_step = 1; // trigger first step
}
}
}
}
}

129
Src/uart_dmx.c
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@ -1,129 +0,0 @@
#include "uart_dmx.h"
#include "SEGGER_SYSVIEW.h"
#include "stdio.h"
#include "stm32g0xx_hal.h"
#include "system_stm32g0xx.h"
uint8_t rxBuffer[BUFFER_SIZE];
uint16_t rxBufferPos = 0;
void init_UART1_it(){
RCC->APBENR2 |= RCC_APBENR2_USART1EN;
RCC->IOPENR |= RCC_IOPENR_GPIOCEN;
GPIOC->MODER &= ~GPIO_MODER_MODE5; // Alternate function mode on RX pin
GPIOC->MODER |= GPIO_MODER_MODE5_1;
GPIOC->AFR[0] &= GPIO_AFRL_AFSEL5;
GPIOC->AFR[0] |= 1 << GPIO_AFRL_AFSEL5_Pos; // AF1 -> USART1 RX
USART1->BRR = 128; // 32000000÷250000
USART1->CR1 = USART_CR1_RE;
USART1->CR3 |= USART_CR3_EIE; // Interrupt on BREAK (and other errors)
USART1->CR1 |= USART_CR1_RXNEIE_RXFNEIE; // RX Interrupt
USART1->CR1 |= USART_CR1_UE;
HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(USART1_IRQn);
}
void init_UART1_dma(){
RCC->IOPENR |= RCC_IOPENR_GPIOCEN;
RCC->APBENR2 |= RCC_APBENR2_USART1EN;
RCC->AHBENR |= RCC_AHBENR_DMA1EN;
GPIOC->MODER &= ~GPIO_MODER_MODE5; // Alternate function mode on RX pin
GPIOC->MODER |= GPIO_MODER_MODE5_1;
GPIOC->AFR[0] &= GPIO_AFRL_AFSEL5;
GPIOC->AFR[0] |= 1 << GPIO_AFRL_AFSEL5_Pos; // AF1 -> USART1 RX
USART1->BRR = SystemCoreClock / 250000; // 64000000÷250000
USART1->CR1 = USART_CR1_RE;
USART1->CR3 |= USART_CR3_EIE; // Interrupt on BREAK (and other errors)
USART1->CR3 |= USART_CR3_DMAR; // DMA Receiver mode
DMA1_Channel1->CCR = (0x02 << DMA_CCR_PL_Pos) | DMA_CCR_MINC | DMA_CCR_TCIE;
DMA1_Channel1->CMAR = ( uint32_t )&rxBuffer[0];
DMA1_Channel1->CPAR = ( uint32_t )&(USART1->RDR);
DMA1_Channel1->CNDTR = 5;
DMAMUX1_Channel0->CCR &= ~( DMAMUX_CxCR_DMAREQ_ID );
DMAMUX1_Channel0->CCR |= ( 50 << DMAMUX_CxCR_DMAREQ_ID_Pos ); // 50 -> USART1 RX
USART1->CR1 |= USART_CR1_UE;
HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(USART1_IRQn);
HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
}
void Reset_DMA(void) {
// Disable the DMA channel
DMA1_Channel1->CCR &= ~DMA_CCR_EN; // Disable DMA Channel 1
// Clear the transfer complete flag
DMA1->IFCR |= DMA_IFCR_CTCIF1; // Clear transfer complete flag for Channel 1
// Reconfigure the DMA
DMA1_Channel1->CMAR = (uint32_t)rxBuffer; // Set memory address to the start of the buffer
DMA1_Channel1->CNDTR = BUFFER_SIZE; // Set number of data items to transfer
// Enable the DMA channel again
DMA1_Channel1->CCR |= DMA_CCR_EN; // Enable DMA Channel 1
}
void USART1_IRQHandler(){
SEGGER_SYSVIEW_RecordEnterISR();
if(USART1->ISR & USART_ISR_RXNE_RXFNE){
//SEGGER_SYSVIEW_PrintfHost("RXNE");
//printf("%x ", USART1->RDR);
rxBuffer[rxBufferPos++] = USART1->RDR;
if(rxBufferPos >= BUFFER_SIZE){
rxBufferPos = 0;
}
}
if(USART1->ISR & USART_ISR_FE){
//TODO read rx==0
USART1->ICR = USART_ICR_FECF;
//if(rxBufferPos != 514)
// printf("FE after %d\n",rxBufferPos);
//rxBufferPos = 0;
//DMA1_Channel1->CNDTR = 1;
SEGGER_SYSVIEW_PrintfHost("FE");
Reset_DMA();
//DMA1_Channel1->CCR &= ~( DMA_CCR_EN );
//DMA1_Channel1->CNDTR = 512;
//DMA1_Channel1->CMAR = ( uint32_t )&rxBuffer[0];
//DMA1_Channel1->CCR |= ( DMA_CCR_EN );
////DMA1_Channel1->CCR |= ( DMA_CCR_EN );
}
if(USART1->ISR & USART_ISR_ORE){
USART1->ICR = USART_ICR_ORECF;
//printf("ORE\n");
//SEGGER_SYSVIEW_PrintfHost("ORE");
}
if(USART1->ISR & USART_ISR_NE){
USART1->ICR = USART_ICR_NECF;
printf("NE\n");
}
if(USART1->ISR & USART_ISR_UDR){
USART1->ICR = USART_ICR_UDRCF;
printf("UDR\n");
}
SEGGER_SYSVIEW_RecordExitISR();
}
void DMA1_Channel1_IRQHandler(){
SEGGER_SYSVIEW_RecordEnterISR();
if(DMA1->ISR & DMA_ISR_TCIF1){
DMA1->IFCR = DMA_IFCR_CTCIF1;
}
SEGGER_SYSVIEW_PrintfHost("DMA");
SEGGER_SYSVIEW_RecordExitISR();
}

3
compile_flags.txt
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@ -2,7 +2,6 @@
-mthumb
-DUSE_HAL_DRIVER
-DSTM32G0B1xx
-DDMX_ADDRESS=99
-IInc
-IDrivers/STM32G0xx_HAL_Driver/Inc
-IDrivers/STM32G0xx_HAL_Driver/Inc/Legacy
@ -13,7 +12,7 @@
-IDrivers/SystemView/Config
-IDrivers/SystemView/SEGGER
-IDrivers/SystemView/SYSVIEW
-O0
-Og
-Wall
-fdata-sections
-ffunction-sections

257
docs/schematic.drawio
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