#include "uart_dmx.h"
#include "SEGGER_SYSVIEW.h"
#include "stdio.h"
#include "stm32g0xx_hal.h"
#include "system_stm32g0xx.h"

uint8_t rxBuffer[BUFFER_SIZE];
uint16_t rxBufferPos = 0;

void init_UART1_it(){
    RCC->APBENR2 |= RCC_APBENR2_USART1EN;
    RCC->IOPENR |= RCC_IOPENR_GPIOCEN;

    GPIOC->MODER &= ~GPIO_MODER_MODE5; // Alternate function mode on RX pin
    GPIOC->MODER |= GPIO_MODER_MODE5_1;
    GPIOC->AFR[0] &= GPIO_AFRL_AFSEL5;
    GPIOC->AFR[0] |= 1 << GPIO_AFRL_AFSEL5_Pos; // AF1 -> USART1 RX

    USART1->BRR = 128; // 32000000÷250000
    USART1->CR1 = USART_CR1_RE;

    USART1->CR3 |= USART_CR3_EIE; // Interrupt on BREAK (and other errors)
    USART1->CR1 |= USART_CR1_RXNEIE_RXFNEIE; // RX Interrupt

    USART1->CR1 |= USART_CR1_UE;

    HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
    HAL_NVIC_EnableIRQ(USART1_IRQn);
}

void init_UART1_dma(){
    RCC->IOPENR |= RCC_IOPENR_GPIOCEN;
    RCC->APBENR2 |= RCC_APBENR2_USART1EN;
    RCC->AHBENR |= RCC_AHBENR_DMA1EN;

    GPIOC->MODER &= ~GPIO_MODER_MODE5; // Alternate function mode on RX pin
    GPIOC->MODER |= GPIO_MODER_MODE5_1;
    GPIOC->AFR[0] &= GPIO_AFRL_AFSEL5;
    GPIOC->AFR[0] |= 1 << GPIO_AFRL_AFSEL5_Pos; // AF1 -> USART1 RX

    USART1->BRR = SystemCoreClock / 250000; // 64000000÷250000
    USART1->CR1 = USART_CR1_RE;

    USART1->CR3 |= USART_CR3_EIE; // Interrupt on BREAK (and other errors)
    USART1->CR3 |= USART_CR3_DMAR; // DMA Receiver mode

    DMA1_Channel1->CCR = (0x02 << DMA_CCR_PL_Pos) | DMA_CCR_MINC | DMA_CCR_TCIE;

    DMA1_Channel1->CMAR  = ( uint32_t )&rxBuffer[0];
    DMA1_Channel1->CPAR  = ( uint32_t )&(USART1->RDR);
    DMA1_Channel1->CNDTR = 5;

    DMAMUX1_Channel0->CCR &= ~( DMAMUX_CxCR_DMAREQ_ID );
    DMAMUX1_Channel0->CCR |=  ( 50 << DMAMUX_CxCR_DMAREQ_ID_Pos ); // 50 -> USART1 RX

    USART1->CR1 |= USART_CR1_UE;

    HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
    HAL_NVIC_EnableIRQ(USART1_IRQn);

    HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
    HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
}

void Reset_DMA(void) {
    // Disable the DMA channel
    DMA1_Channel1->CCR &= ~DMA_CCR_EN; // Disable DMA Channel 1

    // Clear the transfer complete flag
    DMA1->IFCR |= DMA_IFCR_CTCIF1; // Clear transfer complete flag for Channel 1

    // Reconfigure the DMA
    DMA1_Channel1->CMAR = (uint32_t)rxBuffer; // Set memory address to the start of the buffer
    DMA1_Channel1->CNDTR = BUFFER_SIZE; // Set number of data items to transfer

    // Enable the DMA channel again
    DMA1_Channel1->CCR |= DMA_CCR_EN; // Enable DMA Channel 1
}

void USART1_IRQHandler(){
    SEGGER_SYSVIEW_RecordEnterISR();
     if(USART1->ISR & USART_ISR_RXNE_RXFNE){
         //SEGGER_SYSVIEW_PrintfHost("RXNE");
         //printf("%x ", USART1->RDR);
         rxBuffer[rxBufferPos++] = USART1->RDR;
         if(rxBufferPos >= BUFFER_SIZE){
             rxBufferPos = 0;
         }
     }

     if(USART1->ISR & USART_ISR_FE){
         //TODO read rx==0
         USART1->ICR = USART_ICR_FECF;
         //if(rxBufferPos != 514)
         //    printf("FE after %d\n",rxBufferPos);
         //rxBufferPos = 0;
         //DMA1_Channel1->CNDTR = 1;
         SEGGER_SYSVIEW_PrintfHost("FE");
         Reset_DMA();
         //DMA1_Channel1->CCR &= ~( DMA_CCR_EN );
         //DMA1_Channel1->CNDTR = 512;
         //DMA1_Channel1->CMAR  = ( uint32_t )&rxBuffer[0];
         //DMA1_Channel1->CCR |= ( DMA_CCR_EN );
         ////DMA1_Channel1->CCR |= ( DMA_CCR_EN );
     }
     if(USART1->ISR & USART_ISR_ORE){
         USART1->ICR = USART_ICR_ORECF;
         //printf("ORE\n");
         //SEGGER_SYSVIEW_PrintfHost("ORE");
     }
     if(USART1->ISR & USART_ISR_NE){
         USART1->ICR = USART_ICR_NECF;
         printf("NE\n");
     }
     if(USART1->ISR & USART_ISR_UDR){
         USART1->ICR = USART_ICR_UDRCF;
         printf("UDR\n");
     }
    SEGGER_SYSVIEW_RecordExitISR();
}

void DMA1_Channel1_IRQHandler(){
    SEGGER_SYSVIEW_RecordEnterISR();
    if(DMA1->ISR & DMA_ISR_TCIF1){
        DMA1->IFCR = DMA_IFCR_CTCIF1;
    }
    SEGGER_SYSVIEW_PrintfHost("DMA");
    SEGGER_SYSVIEW_RecordExitISR();
}