commit 5f31e98d5ccb70907eb0c14bb8cac469950bb27d Author: Eggert Jung Date: Tue Jul 7 22:07:44 2026 +0200 initial diff --git a/Makefile b/Makefile new file mode 100644 index 0000000..f2952e7 --- /dev/null +++ b/Makefile @@ -0,0 +1,59 @@ +TARGET = main +SRCS := $(shell find -name '*.c') +FILES = $(SRCS:%.c=%) #main uart avrIOhelper/io-helper #uart#hier alle c-Datein reinschreiben, trennung durch " " und ohne .c-Endung +MCU = atmega16 +PROGC = m16 +CC = avr-gcc +TOOL = stk500 -P /dev/ttyUSB0 +#TOOL = atmelice_isp +#TOOL = avrispmkii +#TOOL = usbasp-clone + +BUILDDIR = Builds + +DEFINES = -DF_CPU=8000000UL + +CFLAGS =-mmcu=$(MCU) -O2 -Wall -Wpedantic $(DEFINES) -std=c99 -ffunction-sections -fdata-sections +LDFLAGS =-mmcu=$(MCU) -Wl,--gc-sections + +LDFILES = $(foreach FILE,$(FILES),$(BUILDDIR)/$(FILE).o) + +all: clean $(BUILDDIR)/$(TARGET).elf + +$(BUILDDIR)/%.o: %.c + mkdir -p $(dir $@) + $(CC) $(CFLAGS) -c $< -o $(BUILDDIR)/$*.o + +$(BUILDDIR)/$(TARGET).elf: $(LDFILES) + mkdir -p $(dir $@) + $(CC) $(LDFLAGS) $(LDFILES) -o $(BUILDDIR)/$(TARGET).elf + +$(BUILDDIR)/$(TARGET).hex : $(BUILDDIR)/$(TARGET).elf + avr-objcopy -j .data -j .text -O ihex $< $@ + +fuse: + avrdude -p $(PROGC) -c $(TOOL) -U lfuse:w:0xE8:m -U hfuse:w:0xD1:m + +load: $(BUILDDIR)/$(TARGET).hex + avrdude -p $(PROGC) -c $(TOOL) -U flash:w:$(BUILDDIR)/$(TARGET).hex -v -B 4MHz + +program: clean load + +reset: + avrdude -p $(PROGC) -c $(TOOL) + +size: $(BUILDDIR)/$(TARGET).elf + avr-size -C --mcu=$(MCU) $(BUILDDIR)/$(TARGET).elf + +.PHONY=clean +clean: + rm -rf $(BUILDDIR) + + +#Fuse m1284p external Osz. Long startuptime +# avrdude -c usbasp-clone -p m1284p -U lfuse:w:0xff:m -U hfuse:w:0xd9:m -U efuse:w:0xff:m + +#Fuse m1284p internal Osz. Long startuptime +# avrdude -c usbasp-clone -p m1284p -U lfuse:w:0xe2:m -U hfuse:w:0xd9:m -U efuse:w:0xff:m + + diff --git a/README.txt b/README.txt new file mode 100644 index 0000000..c8b8c6e --- /dev/null +++ b/README.txt @@ -0,0 +1,13 @@ +IRMP - Infrared Multi Protocol Decoder +-------------------------------------- + +Version IRMP: 3.2.6 2021-01-27 +Version IRSND: 3.2.6 2021-01-27 + +Documentation: + + http://www.mikrocontroller.net/articles/IRMP + http://www.mikrocontroller.net/articles/IRMP_-_english + + http://www.mikrocontroller.net/articles/IRSND + http://www.mikrocontroller.net/articles/IRSND_-_english diff --git a/irmpprotocols.h b/irmpprotocols.h new file mode 100644 index 0000000..81e115c --- /dev/null +++ b/irmpprotocols.h @@ -0,0 +1,1140 @@ +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * irmpprotocols.h - irmp protocols + * + * DO NOT INCLUDE THIS FILE, WILL BE INCLUDED BY IRMP.H or IRSND.H! + * + * Copyright (c) 2013-2020 Frank Meyer - frank(at)fli4l.de + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ + +#ifndef _IRMP_PROTOCOLS_H_ +#define _IRMP_PROTOCOLS_H_ + +#if !defined(_IRMP_H_) && !defined(_IRSND_H_) +# error please include only irmp.h or irsnd.h, not irmpprotocols.h +#endif + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * IR protocols: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define IRMP_UNKNOWN_PROTOCOL 0 // unknown protocol +#define IRMP_SIRCS_PROTOCOL 1 // Sony +#define IRMP_NEC_PROTOCOL 2 // NEC, Pioneer, JVC, Toshiba, NoName etc. +#define IRMP_SAMSUNG_PROTOCOL 3 // Samsung +#define IRMP_MATSUSHITA_PROTOCOL 4 // Matsushita +#define IRMP_KASEIKYO_PROTOCOL 5 // Kaseikyo (Panasonic etc) +#define IRMP_RECS80_PROTOCOL 6 // Philips, Thomson, Nordmende, Telefunken, Saba +#define IRMP_RC5_PROTOCOL 7 // Philips etc +#define IRMP_DENON_PROTOCOL 8 // Denon, Sharp +#define IRMP_RC6_PROTOCOL 9 // Philips etc +#define IRMP_SAMSUNG32_PROTOCOL 10 // Samsung32: no sync pulse at bit 16, length 32 instead of 37 +#define IRMP_APPLE_PROTOCOL 11 // Apple, very similar to NEC +#define IRMP_RECS80EXT_PROTOCOL 12 // Philips, Technisat, Thomson, Nordmende, Telefunken, Saba +#define IRMP_NUBERT_PROTOCOL 13 // Nubert +#define IRMP_BANG_OLUFSEN_PROTOCOL 14 // Bang & Olufsen +#define IRMP_GRUNDIG_PROTOCOL 15 // Grundig +#define IRMP_NOKIA_PROTOCOL 16 // Nokia +#define IRMP_SIEMENS_PROTOCOL 17 // Siemens, e.g. Gigaset +#define IRMP_FDC_PROTOCOL 18 // FDC keyboard +#define IRMP_RCCAR_PROTOCOL 19 // RC Car +#define IRMP_JVC_PROTOCOL 20 // JVC (NEC with 16 bits) +#define IRMP_RC6A_PROTOCOL 21 // RC6A, e.g. Kathrein, XBOX +#define IRMP_NIKON_PROTOCOL 22 // Nikon +#define IRMP_RUWIDO_PROTOCOL 23 // Ruwido, e.g. T-Home Mediareceiver +#define IRMP_IR60_PROTOCOL 24 // IR60 (SDA2008) +#define IRMP_KATHREIN_PROTOCOL 25 // Kathrein +#define IRMP_NETBOX_PROTOCOL 26 // Netbox keyboard (bitserial) +#define IRMP_NEC16_PROTOCOL 27 // NEC with 16 bits (incl. sync) +#define IRMP_NEC42_PROTOCOL 28 // NEC with 42 bits +#define IRMP_LEGO_PROTOCOL 29 // LEGO Power Functions RC +#define IRMP_THOMSON_PROTOCOL 30 // Thomson +#define IRMP_BOSE_PROTOCOL 31 // BOSE +#define IRMP_A1TVBOX_PROTOCOL 32 // A1 TV Box +#define IRMP_ORTEK_PROTOCOL 33 // ORTEK - Hama +#define IRMP_TELEFUNKEN_PROTOCOL 34 // Telefunken (1560) +#define IRMP_ROOMBA_PROTOCOL 35 // iRobot Roomba vacuum cleaner +#define IRMP_RCMM32_PROTOCOL 36 // Fujitsu-Siemens (Activy remote control) +#define IRMP_RCMM24_PROTOCOL 37 // Fujitsu-Siemens (Activy keyboard) +#define IRMP_RCMM12_PROTOCOL 38 // Fujitsu-Siemens (Activy keyboard) +#define IRMP_SPEAKER_PROTOCOL 39 // Another loudspeaker protocol, similar to Nubert +#define IRMP_LGAIR_PROTOCOL 40 // LG air conditioner +#define IRMP_SAMSUNG48_PROTOCOL 41 // air conditioner with SAMSUNG protocol (48 bits) +#define IRMP_MERLIN_PROTOCOL 42 // Merlin (Pollin 620 185) +#define IRMP_PENTAX_PROTOCOL 43 // Pentax camera +#define IRMP_FAN_PROTOCOL 44 // FAN (ventilator), very similar to NUBERT, but last bit is data bit instead of stop bit +#define IRMP_S100_PROTOCOL 45 // very similar to RC5, but 14 instead of 13 data bits +#define IRMP_ACP24_PROTOCOL 46 // Stiebel Eltron ACP24 air conditioner +#define IRMP_TECHNICS_PROTOCOL 47 // Technics, similar to Matsushita, but 22 instead of 24 bits +#define IRMP_PANASONIC_PROTOCOL 48 // Panasonic (Beamer), start bits similar to KASEIKYO +#define IRMP_MITSU_HEAVY_PROTOCOL 49 // Mitsubishi-Heavy Aircondition, similar timing as Panasonic beamer +#define IRMP_VINCENT_PROTOCOL 50 // Vincent +#define IRMP_SAMSUNGAH_PROTOCOL 51 // SAMSUNG AH +#define IRMP_IRMP16_PROTOCOL 52 // IRMP specific protocol for data transfer, e.g. between two microcontrollers via IR +#define IRMP_GREE_PROTOCOL 53 // Gree climate +#define IRMP_RCII_PROTOCOL 54 // RC II Infra Red Remote Control Protocol for FM8 +#define IRMP_METZ_PROTOCOL 55 // METZ +#define IRMP_ONKYO_PROTOCOL 56 + +#define RF_GEN24_PROTOCOL 57 // RF Generic, 24 Bits (Pollin 550666, EAN 4049702006022 and many other similar RF remote controls)) +#define RF_X10_PROTOCOL 58 // RF PC X10 Remote Control (Medion, Pollin 721815) +#define RF_MEDION_PROTOCOL 59 // RF PC Medion Remote Control (Medion) + +#define IRMP_MELINERA_PROTOCOL 60 + +#define IRMP_N_PROTOCOLS 60 // number of supported protocols + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * timing constants: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +// fm 22.09.2011: may not be more than 16000L, otherwise some JVC codes will not be accepted +#define IRMP_TIMEOUT_TIME 15500.0e-6 // timeout after 15.5 ms darkness +#define IRMP_TIMEOUT_TIME_MS 15500L // timeout after 15.5 ms darkness + +#if IRMP_SUPPORT_NIKON_PROTOCOL == 1 +# define IRMP_TIMEOUT_NIKON_TIME 29500.0e-6 // 2nd timeout after 29.5 ms darkness (only for NIKON!) +# define IRMP_TIMEOUT_NIKON_TIME_MS 29500L // 2nd timeout after 29.5 ms darkness +typedef uint16_t PAUSE_LEN; +# define IRMP_TIMEOUT_NIKON_LEN (PAUSE_LEN)(F_INTERRUPTS * IRMP_TIMEOUT_NIKON_TIME + 0.5) +#else +# if (F_INTERRUPTS * IRMP_TIMEOUT_TIME_MS) / 1000000 >= 254 +typedef uint16_t PAUSE_LEN; +# else +typedef uint8_t PAUSE_LEN; +# endif +#endif + +#define IRMP_TIMEOUT_LEN (PAUSE_LEN)(F_INTERRUPTS * IRMP_TIMEOUT_TIME + 0.5) + +#define IRMP_KEY_RELEASE_TIME 25.0e-3 // key release timeout detection after 25.0 ms darkness +#define IRMP_KEY_RELEASE_LEN (uint16_t)(F_INTERRUPTS * IRMP_KEY_RELEASE_TIME + 0.5) + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * flags of struct IRMP_PARAMETER: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define IRMP_PARAM_FLAG_IS_MANCHESTER 0x01 +#define IRMP_PARAM_FLAG_1ST_PULSE_IS_1 0x02 +#define IRMP_PARAM_FLAG_IS_SERIAL 0x04 + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * SIRCS: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define SIRCS_START_BIT_PULSE_TIME 2400.0e-6 // 2400 usec pulse +#define SIRCS_START_BIT_PAUSE_TIME 600.0e-6 // 600 usec pause +#define SIRCS_1_PULSE_TIME 1200.0e-6 // 1200 usec pulse +#define SIRCS_0_PULSE_TIME 600.0e-6 // 600 usec pulse +#define SIRCS_PAUSE_TIME 600.0e-6 // 600 usec pause +#define SIRCS_FRAMES 3 // SIRCS sends each frame 3 times +#define SIRCS_AUTO_REPETITION_PAUSE_TIME 25.0e-3 // auto repetition after 25ms +#define SIRCS_FRAME_REPEAT_PAUSE_TIME 25.0e-3 // frame repeat after 25ms +#define SIRCS_ADDRESS_OFFSET 15 // skip 15 bits +#define SIRCS_ADDRESS_LEN 5 // read up to 5 address bits +#define SIRCS_COMMAND_OFFSET 0 // skip 0 bits +#define SIRCS_COMMAND_LEN 15 // read 12-15 command bits +#define SIRCS_MINIMUM_DATA_LEN 12 // minimum data length +#define SIRCS_COMPLETE_DATA_LEN 20 // complete length - may be up to 20 +#define SIRCS_STOP_BIT 0 // has no stop bit +#define SIRCS_LSB 1 // LSB...MSB +#define SIRCS_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- ++ * NEC & NEC42 & NEC16 & LGAIR & MELINERA: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define NEC_START_BIT_PULSE_TIME 9000.0e-6 // 9000 usec pulse +#define NEC_START_BIT_PAUSE_TIME 4500.0e-6 // 4500 usec pause +#define NEC_REPEAT_START_BIT_PAUSE_TIME 2250.0e-6 // 2250 usec pause +#define NEC_PULSE_TIME 560.0e-6 // 560 usec pulse +#define NEC_1_PAUSE_TIME 1690.0e-6 // 1690 usec pause +#define NEC_0_PAUSE_TIME 560.0e-6 // 560 usec pause +#define NEC_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40ms +#define NEC_ADDRESS_OFFSET 0 // skip 0 bits +#define NEC_ADDRESS_LEN 16 // read 16 address bits +#define NEC_COMMAND_OFFSET 16 // skip 16 bits (8 address + 8 /address) +#define NEC_COMMAND_LEN 16 // read 16 bits (8 command + 8 /command) +#define NEC_COMPLETE_DATA_LEN 32 // complete length +#define NEC_STOP_BIT 1 // has stop bit +#define NEC_LSB 1 // LSB...MSB +#define NEC_FLAGS 0 // flags + +#define NEC42_ADDRESS_OFFSET 0 // skip 0 bits +#define NEC42_ADDRESS_LEN 13 // read 13 address bits +#define NEC42_COMMAND_OFFSET 26 // skip 26 bits (2 x 13 address bits) +#define NEC42_COMMAND_LEN 8 // read 8 command bits +#define NEC42_COMPLETE_DATA_LEN 42 // complete length (2 x 13 + 2 x 8) + +#define LGAIR_ADDRESS_OFFSET 0 // skip 0 bits +#define LGAIR_ADDRESS_LEN 8 // read 8 address bits +#define LGAIR_COMMAND_OFFSET 8 // skip 8 bits (8 address) +#define LGAIR_COMMAND_LEN 16 // read 16 bits (16 command) +#define LGAIR_COMPLETE_DATA_LEN 28 // complete length (8 address + 16 command + 4 checksum) + +#define NEC16_ADDRESS_OFFSET 0 // skip 0 bits +#define NEC16_ADDRESS_LEN 8 // read 8 address bits +#define NEC16_COMMAND_OFFSET 8 // skip 8 bits (8 address) +#define NEC16_COMMAND_LEN 8 // read 8 bits (8 command) +#define NEC16_COMPLETE_DATA_LEN 16 // complete length + +#define MELINERA_START_BIT_PULSE_TIME 8800.0e-6 // 8800 usec pulse +#define MELINERA_START_BIT_PAUSE_TIME 4100.0e-6 // 4100 usec pause +#define MELINERA_0_PULSE_TIME 440.0e-6 // 430 usec pause +#define MELINERA_0_PAUSE_TIME 590.0e-6 // 600 usec pause +#define MELINERA_1_PULSE_TIME 970.0e-6 // 910 usec pause +#define MELINERA_1_PAUSE_TIME 1140.0e-6 // 1160 usec pause +#define MELINERA_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40ms +#define MELINERA_ADDRESS_OFFSET 0 // skip 0 bits +#define MELINERA_ADDRESS_LEN 0 // read 0 address bits +#define MELINERA_COMMAND_OFFSET 0 // skip 0 bits (0 address) +#define MELINERA_COMMAND_LEN 8 // read 8 bits (8 command) +#define MELINERA_COMPLETE_DATA_LEN 8 // complete length +#define MELINERA_STOP_BIT 1 // has stop bit +#define MELINERA_LSB 0 // MSB +#define MELINERA_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * SAMSUNG & SAMSUNG32 & SAMSUNG48: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define SAMSUNG_START_BIT_PULSE_TIME 4500.0e-6 // 4500 usec pulse +#define SAMSUNG_START_BIT_PAUSE_TIME 4500.0e-6 // 4500 usec pause +#define SAMSUNG_PULSE_TIME 550.0e-6 // 550 usec pulse +#define SAMSUNG_1_PAUSE_TIME 1500.0e-6 // 1550 usec pause +#define SAMSUNG_0_PAUSE_TIME 500.0e-6 // 500 usec pause + +#define SAMSUNG_FRAME_REPEAT_PAUSE_TIME 25.0e-3 // frame repeat after 25ms +#define SAMSUNG_ADDRESS_OFFSET 0 // skip 0 bits +#define SAMSUNG_ADDRESS_LEN 16 // read 16 address bits +#define SAMSUNG_ID_OFFSET 17 // skip 16 + 1 sync bit +#define SAMSUNG_ID_LEN 4 // read 4 id bits +#define SAMSUNG_COMMAND_OFFSET 21 // skip 16 + 1 sync + 4 data bits +#define SAMSUNG_COMMAND_LEN 16 // read 16 command bits +#define SAMSUNG_COMPLETE_DATA_LEN 37 // complete length +#define SAMSUNG_STOP_BIT 1 // has stop bit +#define SAMSUNG_LSB 1 // LSB...MSB? +#define SAMSUNG_FLAGS 0 // flags + +#define SAMSUNG32_COMMAND_OFFSET 16 // skip 16 bits +#define SAMSUNG32_COMMAND_LEN 16 // read 16 command bits +#define SAMSUNG32_COMPLETE_DATA_LEN 32 // complete length +#define SAMSUNG32_FRAMES 1 // SAMSUNG32 sends one frame +#define SAMSUNG32_AUTO_REPETITION_PAUSE_TIME 47.0e-3 // repetition after 47 ms +#define SAMSUNG32_FRAME_REPEAT_PAUSE_TIME 47.0e-3 // frame repeat after 47ms + +#define SAMSUNG48_COMMAND_OFFSET 16 // skip 16 bits +#define SAMSUNG48_COMMAND_LEN 32 // read 32 command bits +#define SAMSUNG48_COMPLETE_DATA_LEN 48 // complete length +#define SAMSUNG48_FRAMES 2 // SAMSUNG48 sends each frame 2 times +#define SAMSUNG48_AUTO_REPETITION_PAUSE_TIME 5.0e-3 // repetition after 5 ms +#define SAMSUNG48_FRAME_REPEAT_PAUSE_TIME 47.0e-3 // frame repeat after 47ms + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * SAMSUNGAH: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define SAMSUNGAH_START_BIT_PULSE_TIME 2500.0e-6 // 2500 usec pulse +#define SAMSUNGAH_START_BIT_PAUSE_TIME 1900.0e-6 // 1900 usec pause +#define SAMSUNGAH_PULSE_TIME 450.0e-6 // 450 usec pulse +#define SAMSUNGAH_1_PAUSE_TIME 1100.0e-6 // 1100 usec pause +#define SAMSUNGAH_0_PAUSE_TIME 450.0e-6 // 450 usec pause +#define SAMSUNGAH_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40ms +#define SAMSUNGAH_ADDRESS_OFFSET 0 // skip 0 bits +#define SAMSUNGAH_ADDRESS_LEN 16 // read 16 address bits, ignore 17..31 +#define SAMSUNGAH_COMMAND_OFFSET 32 // skip 32 bits +#define SAMSUNGAH_COMMAND_LEN 16 // read 32 bits +#define SAMSUNGAH_COMPLETE_DATA_LEN 48 // complete length +#define SAMSUNGAH_STOP_BIT 1 // has stop bit +#define SAMSUNGAH_LSB 1 // LSB...MSB? +#define SAMSUNGAH_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * MATSUSHITA: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define MATSUSHITA_START_BIT_PULSE_TIME 3488.0e-6 // 3488 usec pulse +#define MATSUSHITA_START_BIT_PAUSE_TIME 3488.0e-6 // 3488 usec pause +#define MATSUSHITA_PULSE_TIME 872.0e-6 // 872 usec pulse +#define MATSUSHITA_1_PAUSE_TIME 2616.0e-6 // 2616 usec pause +#define MATSUSHITA_0_PAUSE_TIME 872.0e-6 // 872 usec pause +#define MATSUSHITA_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40ms +#define MATSUSHITA_ADDRESS_OFFSET 12 // skip 12 bits +#define MATSUSHITA_ADDRESS_LEN 12 // read 12 address bits +#define MATSUSHITA_COMMAND_OFFSET 0 // skip 0 bits +#define MATSUSHITA_COMMAND_LEN 12 // read 12 bits (6 custom + 6 command) +#define MATSUSHITA_COMPLETE_DATA_LEN 24 // complete length +#define MATSUSHITA_STOP_BIT 1 // has stop bit +#define MATSUSHITA_LSB 1 // LSB...MSB? +#define MATSUSHITA_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * TECHNICS: same timings as MATSUSHITA + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define TECHNICS_ADDRESS_LEN 0 // read 0 address bits +#define TECHNICS_COMMAND_LEN 11 // read 11 bits +#define TECHNICS_COMPLETE_DATA_LEN 22 // complete length + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * KASEIKYO: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define KASEIKYO_START_BIT_PULSE_TIME 3380.0e-6 // 3380 usec pulse +#define KASEIKYO_START_BIT_PAUSE_TIME 1690.0e-6 // 1690 usec pause +#define KASEIKYO_PULSE_TIME 423.0e-6 // 525 usec pulse +#define KASEIKYO_1_PAUSE_TIME 1269.0e-6 // 525 usec pause +#define KASEIKYO_0_PAUSE_TIME 423.0e-6 // 1690 usec pause +#define KASEIKYO_AUTO_REPETITION_PAUSE_TIME 74.0e-3 // repetition after 74 ms +#define KASEIKYO_FRAME_REPEAT_PAUSE_TIME 74.0e-3 // frame repeat after 74 ms +#define KASEIKYO_ADDRESS_OFFSET 0 // skip 0 bits +#define KASEIKYO_ADDRESS_LEN 16 // read 16 address bits +#define KASEIKYO_COMMAND_OFFSET 28 // skip 28 bits (16 manufacturer & 4 parity & 8 genre) +#define KASEIKYO_COMMAND_LEN 12 // read 12 command bits (10 real command & 2 id) +#define KASEIKYO_COMPLETE_DATA_LEN 48 // complete length +#define KASEIKYO_STOP_BIT 1 // has stop bit +#define KASEIKYO_LSB 1 // LSB...MSB? +#define KASEIKYO_FRAMES 1 // KASEIKYO sends 1 frame +#define KASEIKYO_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * PANASONIC (Beamer), start bit timings similar to KASEIKYO + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define PANASONIC_START_BIT_PULSE_TIME 3600.0e-6 // 3600 usec pulse +#define PANASONIC_START_BIT_PAUSE_TIME 1600.0e-6 // 1690 usec pause +#define PANASONIC_PULSE_TIME 565.0e-6 // 565 usec pulse +#define PANASONIC_1_PAUSE_TIME 1140.0e-6 // 1140 usec pause +#define PANASONIC_0_PAUSE_TIME 316.0e-6 // 316 usec pause +#define PANASONIC_AUTO_REPETITION_PAUSE_TIME 40.0e-3 // repetition after 40 ms? +#define PANASONIC_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40 ms +#define PANASONIC_ADDRESS_OFFSET 24 // skip 24 bits: 010000000000010000000001 +#define PANASONIC_ADDRESS_LEN 16 // read 16 address bits +#define PANASONIC_COMMAND_OFFSET 40 // skip 40 bits +#define PANASONIC_COMMAND_LEN 16 // read 16 command bits +#define PANASONIC_COMPLETE_DATA_LEN 56 // complete length +#define PANASONIC_STOP_BIT 1 // has stop bit +#define PANASONIC_LSB 1 // LSB...MSB? +#define PANASONIC_FRAMES 1 // PANASONIC sends 1 frame +#define PANASONIC_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * MITSUBISHI-Heavy Aircondition, timings similar to PANASONIC beamer + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define MITSU_HEAVY_START_BIT_PULSE_TIME 3200.0e-6 // 3600 usec pulse +#define MITSU_HEAVY_START_BIT_PAUSE_TIME 1560.0e-6 // 1690 usec pause +#define MITSU_HEAVY_PULSE_TIME 400.0e-6 // 565 usec pulse +#define MITSU_HEAVY_1_PAUSE_TIME 1200.0e-6 // 1140 usec pause +#define MITSU_HEAVY_0_PAUSE_TIME 430.0e-6 // 316 usec pause +#define MITSU_HEAVY_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40 ms +#define MITSU_HEAVY_ADDRESS_OFFSET 40 // skip 24 bits: 010000000000010000000001 +#define MITSU_HEAVY_ADDRESS_LEN 16 // read 16 address bits +#define MITSU_HEAVY_COMMAND_OFFSET 56 // skip 40 bits +#define MITSU_HEAVY_COMMAND_LEN 16 // read 16 command bits +#define MITSU_HEAVY_COMPLETE_DATA_LEN 88 // complete length +#define MITSU_HEAVY_STOP_BIT 1 // has stop bit +#define MITSU_HEAVY_LSB 0 // LSB...MSB? +#define MITSU_HEAVY_FRAMES 1 // PANASONIC sends 1 frame +#define MITSU_HEAVY_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * VINCENT + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define VINCENT_START_BIT_PULSE_TIME 2500.0e-6 // 2500 usec pulse +#define VINCENT_START_BIT_PAUSE_TIME 4600.0e-6 // 4600 usec pause +#define VINCENT_PULSE_TIME 550.0e-6 // 550 usec pulse +#define VINCENT_1_PAUSE_TIME 1540.0e-6 // 1540 usec pause +#define VINCENT_0_PAUSE_TIME 550.0e-6 // 550 usec pause +#define VINCENT_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40 ms ? +#define VINCENT_ADDRESS_OFFSET 0 // skip 0 bits +#define VINCENT_ADDRESS_LEN 16 // read 16 address bits +#define VINCENT_COMMAND_OFFSET 16 // skip 16 bits +#define VINCENT_COMMAND_LEN 16 // read 16 command bits +#define VINCENT_COMPLETE_DATA_LEN 32 // complete length +#define VINCENT_STOP_BIT 1 // has stop bit +#define VINCENT_LSB 0 // LSB...MSB? +#define VINCENT_FRAMES 1 // VINCENT sends 1 frame +#define VINCENT_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * RECS80: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define RECS80_START_BIT_PULSE_TIME 158.0e-6 // 158 usec pulse +#define RECS80_START_BIT_PAUSE_TIME 7432.0e-6 // 7432 usec pause +#define RECS80_PULSE_TIME 158.0e-6 // 158 usec pulse +#define RECS80_1_PAUSE_TIME 7432.0e-6 // 7432 usec pause +#define RECS80_0_PAUSE_TIME 4902.0e-6 // 4902 usec pause +#define RECS80_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms +#define RECS80_ADDRESS_OFFSET 1 // skip 1 bit (toggle bit) +#define RECS80_ADDRESS_LEN 3 // read 3 address bits +#define RECS80_COMMAND_OFFSET 4 // skip 4 bits (1 toggle + 3 address) +#define RECS80_COMMAND_LEN 6 // read 6 command bits +#define RECS80_COMPLETE_DATA_LEN 10 // complete length +#define RECS80_STOP_BIT 1 // has stop bit +#define RECS80_LSB 0 // MSB...LSB +#define RECS80_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * RC5: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define RC5_BIT_TIME 889.0e-6 // 889 usec pulse/pause +#define RC5_FRAME_REPEAT_PAUSE_TIME 88.9e-3 // frame repeat after 88.9ms + +#define RC5_ADDRESS_OFFSET 1 // skip 1 bit (2nd start) +#define RC5_ADDRESS_LEN 6 // read 1 toggle bit (for key repetition detection) + 5 address bits +#define RC5_COMMAND_OFFSET 7 // skip 5 bits (2nd start + 1 toggle + 5 address) +#define RC5_COMMAND_LEN 6 // read 6 command bits +#define RC5_COMPLETE_DATA_LEN 13 // complete length +#define RC5_STOP_BIT 0 // has no stop bit +#define RC5_LSB 0 // MSB...LSB +#define RC5_FLAGS IRMP_PARAM_FLAG_IS_MANCHESTER // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * RCII: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define RCII_START_BIT_PULSE_TIME 512.0e-6 // 512 usec pulse +#define RCII_START_BIT_PAUSE_TIME 2560.0e-6 // 2560 usec pause +#define RCII_START_BIT2_PULSE_TIME 1024.0e-6 // 1024 usec pulse + +#define RCII_BIT_TIME 512.0e-6 // 512 usec pulse/pause +#define RCII_FRAME_REPEAT_PAUSE_TIME 117.76e-3 // frame repeat after 117.76ms + +#define RCII_ADDRESS_OFFSET 0 // skip 1 bit (2nd start) +#define RCII_ADDRESS_LEN 0 // no address +#define RCII_COMMAND_OFFSET 0 // command offset is 0 +#define RCII_COMMAND_LEN 10 // read 1 + 9 command bits +#define RCII_COMPLETE_DATA_LEN 10 // complete length +#define RCII_STOP_BIT 0 // has no stop bit +#define RCII_LSB 0 // MSB...LSB +#define RCII_FLAGS (IRMP_PARAM_FLAG_IS_MANCHESTER | IRMP_PARAM_FLAG_1ST_PULSE_IS_1) // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * S100: very similar to RC5, but 14 insted of 13 bits + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define S100_BIT_TIME 889.0e-6 // 889 usec pulse/pause +#define S100_FRAME_REPEAT_PAUSE_TIME 88.9e-3 // frame repeat after 88.9ms + +#define S100_ADDRESS_OFFSET 1 // skip 1 bit (2nd start) +#define S100_ADDRESS_LEN 6 // read 1 toggle bit (for key repetition detection) + 5 address bits +#define S100_COMMAND_OFFSET 7 // skip 5 bits (2nd start + 1 toggle + 5 address) +#define S100_COMMAND_LEN 7 // read 7 command bits +#define S100_COMPLETE_DATA_LEN 14 // complete length +#define S100_STOP_BIT 0 // has no stop bit +#define S100_LSB 0 // MSB...LSB +#define S100_FLAGS IRMP_PARAM_FLAG_IS_MANCHESTER // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * DENON: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define DENON_PULSE_TIME 310.0e-6 // 310 usec pulse in practice, 275 in theory +#define DENON_1_PAUSE_TIME 1780.0e-6 // 1780 usec pause in practice, 1900 in theory +#define DENON_0_PAUSE_TIME 745.0e-6 // 745 usec pause in practice, 775 in theory +#define DENON_FRAMES 2 // DENON sends each frame 2 times +#define DENON_AUTO_REPETITION_PAUSE_TIME 45.0e-3 // inverted repetition after 45ms +#define DENON_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms +#define DENON_ADDRESS_OFFSET 0 // skip 0 bits +#define DENON_ADDRESS_LEN 5 // read 5 address bits +#define DENON_COMMAND_OFFSET 5 // skip 5 +#define DENON_COMMAND_LEN 10 // read 10 command bits +#define DENON_COMPLETE_DATA_LEN 15 // complete length +#define DENON_STOP_BIT 1 // has stop bit +#define DENON_LSB 0 // MSB...LSB +#define DENON_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * RC6: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define RC6_START_BIT_PULSE_TIME 2666.0e-6 // 2.666 msec pulse +#define RC6_START_BIT_PAUSE_TIME 889.0e-6 // 889 usec pause +#define RC6_TOGGLE_BIT_TIME 889.0e-6 // 889 msec pulse/pause +#define RC6_BIT_TIME 444.0e-6 // 444 usec pulse/pause +#define RC6_BIT_2_TIME 889.0e-6 // 889 usec pulse/pause +#define RC6_BIT_3_TIME 1333.0e-6 // 1333 usec pulse/pause +#define RC6_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms +#define RC6_ADDRESS_OFFSET 5 // skip "1" + 3 mode bits + 1 toggle bit +#define RC6_ADDRESS_LEN 8 // read 8 address bits +#define RC6_COMMAND_OFFSET 13 // skip 12 bits ("1" + 3 mode + 1 toggle + 8 address) +#define RC6_COMMAND_LEN 8 // read 8 command bits +#define RC6_COMPLETE_DATA_LEN_SHORT 21 // complete length +#define RC6_COMPLETE_DATA_LEN_LONG 36 // complete length +#define RC6_STOP_BIT 0 // has no stop bit +#define RC6_LSB 0 // MSB...LSB +#define RC6_FLAGS (IRMP_PARAM_FLAG_IS_MANCHESTER | IRMP_PARAM_FLAG_1ST_PULSE_IS_1) // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * RECS80EXT: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define RECS80EXT_START_BIT_PULSE_TIME 158.0e-6 // 158 usec pulse +#define RECS80EXT_START_BIT_PAUSE_TIME 3637.0e-6 // 3637 usec pause +#define RECS80EXT_PULSE_TIME 158.0e-6 // 158 usec pulse +#define RECS80EXT_1_PAUSE_TIME 7432.0e-6 // 7432 usec pause +#define RECS80EXT_0_PAUSE_TIME 4902.0e-6 // 4902 usec pause +#define RECS80EXT_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms +#define RECS80EXT_ADDRESS_OFFSET 2 // skip 2 bits (2nd start + 1 toggle) +#define RECS80EXT_ADDRESS_LEN 4 // read 4 address bits +#define RECS80EXT_COMMAND_OFFSET 6 // skip 6 bits (2nd start + 1 toggle + 4 address) +#define RECS80EXT_COMMAND_LEN 6 // read 6 command bits +#define RECS80EXT_COMPLETE_DATA_LEN 12 // complete length +#define RECS80EXT_STOP_BIT 1 // has stop bit +#define RECS80EXT_LSB 0 // MSB...LSB +#define RECS80EXT_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * NUBERT: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define NUBERT_START_BIT_PULSE_TIME 1340.0e-6 // 1340 usec pulse +#define NUBERT_START_BIT_PAUSE_TIME 340.0e-6 // 340 usec pause +#define NUBERT_1_PULSE_TIME 1340.0e-6 // 1340 usec pulse +#define NUBERT_1_PAUSE_TIME 340.0e-6 // 340 usec pause +#define NUBERT_0_PULSE_TIME 500.0e-6 // 500 usec pulse +#define NUBERT_0_PAUSE_TIME 1300.0e-6 // 1300 usec pause +#define NUBERT_FRAMES 2 // Nubert sends 2 frames +#define NUBERT_AUTO_REPETITION_PAUSE_TIME 35.0e-3 // auto repetition after 35ms +#define NUBERT_FRAME_REPEAT_PAUSE_TIME 35.0e-3 // frame repeat after 45ms +#define NUBERT_ADDRESS_OFFSET 0 // skip 0 bits +#define NUBERT_ADDRESS_LEN 0 // read 0 address bits +#define NUBERT_COMMAND_OFFSET 0 // skip 0 bits +#define NUBERT_COMMAND_LEN 10 // read 10 bits +#define NUBERT_COMPLETE_DATA_LEN 10 // complete length +#define NUBERT_STOP_BIT 1 // has stop bit +#define NUBERT_LSB 0 // MSB? +#define NUBERT_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * FAN: (ventilator) + * + * Similar to NUBERT, but + * - has data bit instead of stop bit + * - has NO frame repetition + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define FAN_START_BIT_PULSE_TIME 1280.0e-6 // 1280 usec pulse +#define FAN_START_BIT_PAUSE_TIME 380.0e-6 // 380 usec pause +#define FAN_1_PULSE_TIME 1280.0e-6 // 1280 usec pulse +#define FAN_1_PAUSE_TIME 380.0e-6 // 380 usec pause +#define FAN_0_PULSE_TIME 380.0e-6 // 380 usec pulse +#define FAN_0_PAUSE_TIME 1280.0e-6 // 1280 usec pause +#define FAN_FRAMES 1 // FAN sends only 1 frame (NUBERT sends 2) +#define FAN_AUTO_REPETITION_PAUSE_TIME 6.6e-3 // auto repetition after 6.6ms +#define FAN_FRAME_REPEAT_PAUSE_TIME 6.6e-3 // frame repeat after 6.6ms +#define FAN_ADDRESS_OFFSET 0 // skip 0 bits +#define FAN_ADDRESS_LEN 0 // read 0 address bits +#define FAN_COMMAND_OFFSET 0 // skip 0 bits +#define FAN_COMMAND_LEN 11 // read 10 bits +#define FAN_COMPLETE_DATA_LEN 11 // complete length +#define FAN_STOP_BIT 0 // has NO stop bit (fm: this seems to be wrong) +#define FAN_LSB 0 // MSB +#define FAN_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * SPEAKER: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define SPEAKER_START_BIT_PULSE_TIME 440.0e-6 // 440 usec pulse +#define SPEAKER_START_BIT_PAUSE_TIME 1250.0e-6 // 1250 usec pause +#define SPEAKER_1_PULSE_TIME 1250.0e-6 // 1250 usec pulse +#define SPEAKER_1_PAUSE_TIME 440.0e-6 // 440 usec pause +#define SPEAKER_0_PULSE_TIME 440.0e-6 // 440 usec pulse +#define SPEAKER_0_PAUSE_TIME 1250.0e-6 // 1250 usec pause +#define SPEAKER_FRAMES 2 // SPEAKER sends 2 frames +#define SPEAKER_AUTO_REPETITION_PAUSE_TIME 35.0e-3 // auto repetition after 35ms +#define SPEAKER_FRAME_REPEAT_PAUSE_TIME 35.0e-3 // frame repeat after 45ms +#define SPEAKER_ADDRESS_OFFSET 0 // skip 0 bits +#define SPEAKER_ADDRESS_LEN 0 // read 0 address bits +#define SPEAKER_COMMAND_OFFSET 0 // skip 0 bits +#define SPEAKER_COMMAND_LEN 10 // read 10 bits +#define SPEAKER_COMPLETE_DATA_LEN 10 // complete length +#define SPEAKER_STOP_BIT 1 // has stop bit +#define SPEAKER_LSB 0 // MSB? +#define SPEAKER_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * BANG_OLUFSEN: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define BANG_OLUFSEN_START_BIT1_PULSE_TIME 200.0e-6 // 200 usec pulse +#define BANG_OLUFSEN_START_BIT1_PAUSE_TIME 3125.0e-6 // 3125 usec pause +#define BANG_OLUFSEN_START_BIT2_PULSE_TIME 200.0e-6 // 200 usec pulse +#define BANG_OLUFSEN_START_BIT2_PAUSE_TIME 3125.0e-6 // 3125 usec pause +#define BANG_OLUFSEN_START_BIT3_PULSE_TIME 200.0e-6 // 200 usec pulse +#define BANG_OLUFSEN_START_BIT3_PAUSE_TIME 15625.0e-6 // 15625 usec pause +#define BANG_OLUFSEN_START_BIT4_PULSE_TIME 200.0e-6 // 200 usec pulse +#define BANG_OLUFSEN_START_BIT4_PAUSE_TIME 3125.0e-6 // 3125 usec pause +#define BANG_OLUFSEN_PULSE_TIME 200.0e-6 // 200 usec pulse +#define BANG_OLUFSEN_1_PAUSE_TIME 9375.0e-6 // 9375 usec pause +#define BANG_OLUFSEN_0_PAUSE_TIME 3125.0e-6 // 3125 usec pause +#define BANG_OLUFSEN_R_PAUSE_TIME 6250.0e-6 // 6250 usec pause (repeat last bit) +#define BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME 12500.0e-6 // 12500 usec pause (trailer bit) +#define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms +#define BANG_OLUFSEN_ADDRESS_OFFSET 0 // no address bits +#define BANG_OLUFSEN_ADDRESS_LEN 0 // no address bits +#define BANG_OLUFSEN_COMMAND_OFFSET 3 // skip startbits 2, 3, 4 +#define BANG_OLUFSEN_COMMAND_LEN 16 // read 16 command bits +#define BANG_OLUFSEN_COMPLETE_DATA_LEN 20 // complete length: startbits 2, 3, 4 + 16 data bits + trailer bit +#define BANG_OLUFSEN_STOP_BIT 1 // has stop bit +#define BANG_OLUFSEN_LSB 0 // MSB...LSB +#define BANG_OLUFSEN_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * GRUNDIG & NOKIA + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define GRUNDIG_NOKIA_IR60_BIT_TIME 528.0e-6 // 528 usec pulse/pause +#define GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME 2639.0e-6 // 2639 usec pause after pre bit +#define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME 117.76e-3 // info frame repeat after 117.76 ms +#define GRUNDIG_NOKIA_IR60_STOP_BIT 0 // has no stop bit +#define GRUNDIG_NOKIA_IR60_LSB 1 // MSB...LSB +#define GRUNDIG_NOKIA_IR60_FLAGS (IRMP_PARAM_FLAG_IS_MANCHESTER | IRMP_PARAM_FLAG_1ST_PULSE_IS_1) // flags + +#define GRUNDIG_FRAMES 2 // GRUNDIG sends each frame 1+1 times +#define GRUNDIG_AUTO_REPETITION_PAUSE_TIME 20.0e-3 // repetition after 20ms +#define GRUNDIG_ADDRESS_OFFSET 0 // no address +#define GRUNDIG_ADDRESS_LEN 0 // no address +#define GRUNDIG_COMMAND_OFFSET 1 // skip 1 start bit +#define GRUNDIG_COMMAND_LEN 9 // read 9 command bits +#define GRUNDIG_COMPLETE_DATA_LEN 10 // complete length: 1 start bit + 9 data bits + +#define NOKIA_FRAMES 3 // NOKIA sends each frame 1 + 1 + 1 times +#define NOKIA_AUTO_REPETITION_PAUSE_TIME 20.0e-3 // repetition after 20ms +#define NOKIA_ADDRESS_OFFSET 9 // skip 9 bits (1 start bit + 8 data bits) +#define NOKIA_ADDRESS_LEN 8 // 7 address bits +#define NOKIA_COMMAND_OFFSET 1 // skip 1 bit (1 start bit) +#define NOKIA_COMMAND_LEN 8 // read 8 command bits +#define NOKIA_COMPLETE_DATA_LEN 17 // complete length: 1 start bit + 8 address bits + 8 command bits + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * IR60: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define IR60_FRAMES 2 // IR60 sends each frame 1+1 times +#define IR60_AUTO_REPETITION_PAUSE_TIME 22.2e-3 // repetition after 22.2ms +#define IR60_TIMEOUT_TIME 5000.0e-6 // timeout grundig frame, switch to IR60 +#define IR60_ADDRESS_OFFSET 0 // skip 1 bits +#define IR60_ADDRESS_LEN 0 // read 0 address bits +#define IR60_COMMAND_OFFSET 0 // skip 1 bit (start bit after pre bit, always 1) +#define IR60_COMMAND_LEN 7 // read 6 command bits +#define IR60_COMPLETE_DATA_LEN 7 // complete length + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * SIEMENS & RUWIDO: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ + +#define SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME 275.0e-6 // 275 usec pulse +#define SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME 550.0e-6 // 550 usec pause +#define SIEMENS_OR_RUWIDO_BIT_PULSE_TIME 275.0e-6 // 275 usec short pulse +#define SIEMENS_OR_RUWIDO_BIT_PULSE_TIME_2 550.0e-6 // 550 usec long pulse +#define SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME 275.0e-6 // 275 usec short pause +#define SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME_2 550.0e-6 // 550 usec long pause + +#define SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms +#define SIEMENS_OR_RUWIDO_STOP_BIT 0 // has no stop bit +#define SIEMENS_OR_RUWIDO_LSB 0 // MSB...LSB +#define SIEMENS_OR_RUWIDO_FLAGS (IRMP_PARAM_FLAG_IS_MANCHESTER | IRMP_PARAM_FLAG_1ST_PULSE_IS_1) // flags + +#define RUWIDO_ADDRESS_OFFSET 0 // skip 0 bits +#define RUWIDO_ADDRESS_LEN 9 // read 9 address bits +#define RUWIDO_COMMAND_OFFSET 9 // skip 9 bits +#define RUWIDO_COMMAND_LEN 8 // read 7 + 1 command bits, last bit is only check bit +#define RUWIDO_COMPLETE_DATA_LEN 17 // complete length + +#define SIEMENS_ADDRESS_OFFSET 0 // skip 0 bits +#define SIEMENS_ADDRESS_LEN 11 // read 11 bits +#define SIEMENS_COMMAND_OFFSET 11 // skip 11 bits +#define SIEMENS_COMMAND_LEN 11 // read 10 + 1 command bits, last bit is only check bit +#define SIEMENS_COMPLETE_DATA_LEN 22 // complete length + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * FDC: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define FDC_START_BIT_PULSE_TIME 2085.0e-6 // 2085 usec pulse +#define FDC_START_BIT_PAUSE_TIME 966.0e-6 // 966 usec pause +#define FDC_PULSE_TIME 300.0e-6 // 300 usec pulse +#define FDC_1_PAUSE_TIME 715.0e-6 // 715 usec pause +#define FDC_0_PAUSE_TIME 220.0e-6 // 220 usec pause +#define FDC_FRAME_REPEAT_PAUSE_TIME 60.0e-3 // frame repeat after 60ms +#define FDC_ADDRESS_OFFSET 0 // skip 0 bits +#define FDC_ADDRESS_LEN 14 // read 14 address bits, but use only 6, shift 8 into command +#define FDC_COMMAND_OFFSET 20 // skip 20 bits +#define FDC_COMMAND_LEN 12 // read 12 bits +#define FDC_COMPLETE_DATA_LEN 40 // complete length +#define FDC_STOP_BIT 1 // has stop bit +#define FDC_LSB 1 // LSB...MSB +#define FDC_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * RCCAR: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define RCCAR_START_BIT_PULSE_TIME 2000.0e-6 // 2000 usec pulse +#define RCCAR_START_BIT_PAUSE_TIME 2000.0e-6 // 2000 usec pause +#define RCCAR_PULSE_TIME 600.0e-6 // 360 usec pulse +#define RCCAR_1_PAUSE_TIME 450.0e-6 // 650 usec pause +#define RCCAR_0_PAUSE_TIME 900.0e-6 // 180 usec pause +#define RCCAR_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40ms +#define RCCAR_ADDRESS_OFFSET 0 // skip 0 bits +#define RCCAR_ADDRESS_LEN 0 // read 0 address bits +#define RCCAR_COMMAND_OFFSET 0 // skip 0 bits +#define RCCAR_COMMAND_LEN 13 // read 13 bits +#define RCCAR_COMPLETE_DATA_LEN 13 // complete length +#define RCCAR_STOP_BIT 1 // has stop bit +#define RCCAR_LSB 1 // LSB...MSB +#define RCCAR_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * JVC: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define JVC_START_BIT_PULSE_TIME 9000.0e-6 // 9000 usec pulse +#define JVC_START_BIT_PAUSE_TIME 4500.0e-6 // 4500 usec pause +#define JVC_PULSE_TIME 560.0e-6 // 560 usec pulse +#define JVC_1_PAUSE_TIME 1690.0e-6 // 1690 usec pause +#define JVC_0_PAUSE_TIME 560.0e-6 // 560 usec pause +#define JVC_FRAME_REPEAT_PAUSE_TIME 22.0e-3 // frame repeat after 22ms +#define JVC_ADDRESS_OFFSET 0 // skip 0 bits +#define JVC_ADDRESS_LEN 4 // read 4 address bits +#define JVC_COMMAND_OFFSET 4 // skip 4 bits +#define JVC_COMMAND_LEN 12 // read 12 bits +#define JVC_COMPLETE_DATA_LEN 16 // complete length +#define JVC_STOP_BIT 1 // has stop bit +#define JVC_LSB 1 // LSB...MSB +#define JVC_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * NIKON: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define NIKON_START_BIT_PULSE_TIME 2200.0e-6 // 2200 usec pulse +#define NIKON_START_BIT_PAUSE_TIME 27100.0e-6 // 27100 usec pause +#define NIKON_PULSE_TIME 500.0e-6 // 500 usec pulse +#define NIKON_1_PAUSE_TIME 3500.0e-6 // 3500 usec pause +#define NIKON_0_PAUSE_TIME 1500.0e-6 // 1500 usec pause +#define NIKON_FRAME_REPEAT_PAUSE_TIME 60.0e-3 // frame repeat after 60ms +#define NIKON_ADDRESS_OFFSET 0 // skip 0 bits +#define NIKON_ADDRESS_LEN 0 // read 0 address bits +#define NIKON_COMMAND_OFFSET 0 // skip 0 bits +#define NIKON_COMMAND_LEN 2 // read 2 bits +#define NIKON_COMPLETE_DATA_LEN 2 // complete length +#define NIKON_STOP_BIT 1 // has stop bit +#define NIKON_LSB 0 // LSB...MSB +#define NIKON_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * KATHREIN: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define KATHREIN_START_BIT_PULSE_TIME 210.0e-6 // 1340 usec pulse +#define KATHREIN_START_BIT_PAUSE_TIME 6218.0e-6 // 340 usec pause +#define KATHREIN_1_PULSE_TIME 210.0e-6 // 1340 usec pulse +#define KATHREIN_1_PAUSE_TIME 3000.0e-6 // 340 usec pause +#define KATHREIN_0_PULSE_TIME 210.0e-6 // 500 usec pulse +#define KATHREIN_0_PAUSE_TIME 1400.0e-6 // 1300 usec pause +#define KATHREIN_SYNC_BIT_PAUSE_LEN_TIME 4600.0e-6 // 4600 usec sync (on 6th and/or 8th bit) +#define KATHREIN_FRAMES 1 // Kathrein sends 1 frame +#define KATHREIN_AUTO_REPETITION_PAUSE_TIME 35.0e-3 // auto repetition after 35ms +#define KATHREIN_FRAME_REPEAT_PAUSE_TIME 35.0e-3 // frame repeat after 35ms +#define KATHREIN_ADDRESS_OFFSET 1 // skip 1 bits +#define KATHREIN_ADDRESS_LEN 4 // read 4 address bits +#define KATHREIN_COMMAND_OFFSET 5 // skip 5 bits +#define KATHREIN_COMMAND_LEN 7 // read 7 bits +#define KATHREIN_COMPLETE_DATA_LEN 13 // complete length +#define KATHREIN_STOP_BIT 1 // has stop bit +#define KATHREIN_LSB 0 // MSB +#define KATHREIN_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * NETBOX: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define NETBOX_START_BIT_PULSE_TIME 2400.0e-6 // 2400 usec pulse +#define NETBOX_START_BIT_PAUSE_TIME 800.0e-6 // 800 usec pause +#define NETBOX_PULSE_TIME 800.0e-6 // 800 usec pulse +#define NETBOX_PAUSE_TIME 800.0e-6 // 800 usec pause +#define NETBOX_FRAMES 1 // Netbox sends 1 frame +#define NETBOX_AUTO_REPETITION_PAUSE_TIME 35.0e-3 // auto repetition after 35ms +#define NETBOX_FRAME_REPEAT_PAUSE_TIME 35.0e-3 // frame repeat after 35ms +#define NETBOX_ADDRESS_OFFSET 0 // skip 0 bits +#define NETBOX_ADDRESS_LEN 3 // read 3 address bits +#define NETBOX_COMMAND_OFFSET 3 // skip 3 bits +#define NETBOX_COMMAND_LEN 13 // read 13 bits +#define NETBOX_COMPLETE_DATA_LEN 16 // complete length +#define NETBOX_STOP_BIT 0 // has no stop bit +#define NETBOX_LSB 1 // LSB +#define NETBOX_FLAGS IRMP_PARAM_FLAG_IS_SERIAL // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * LEGO: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define LEGO_START_BIT_PULSE_TIME 158.0e-6 // 158 usec pulse ( 6 x 1/38kHz) +#define LEGO_START_BIT_PAUSE_TIME 1026.0e-6 // 1026 usec pause (39 x 1/38kHz) +#define LEGO_PULSE_TIME 158.0e-6 // 158 usec pulse ( 6 x 1/38kHz) +#define LEGO_1_PAUSE_TIME 553.0e-6 // 553 usec pause (21 x 1/38kHz) +#define LEGO_0_PAUSE_TIME 263.0e-6 // 263 usec pause (10 x 1/38kHz) +#define LEGO_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40ms +#define LEGO_ADDRESS_OFFSET 0 // skip 0 bits +#define LEGO_ADDRESS_LEN 0 // read 0 address bits +#define LEGO_COMMAND_OFFSET 0 // skip 0 bits +#define LEGO_COMMAND_LEN 16 // read 16 bits (12 command + 4 CRC) +#define LEGO_COMPLETE_DATA_LEN 16 // complete length +#define LEGO_STOP_BIT 1 // has stop bit +#define LEGO_LSB 0 // MSB...LSB +#define LEGO_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * THOMSON: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define THOMSON_PULSE_TIME 550.0e-6 // 550 usec pulse +#define THOMSON_1_PAUSE_TIME 4500.0e-6 // 4500 usec pause +#define THOMSON_0_PAUSE_TIME 2000.0e-6 // 2000 usec pause +#define THOMSON_FRAMES 1 // THOMSON sends 1 frame +#define THOMSON_AUTO_REPETITION_PAUSE_TIME 35.0e-3 // repetition after 35ms +#define THOMSON_FRAME_REPEAT_PAUSE_TIME 35.0e-3 // frame repeat after 35ms +#define THOMSON_ADDRESS_OFFSET 0 // skip 0 bits +#define THOMSON_ADDRESS_LEN 4 // read 4 address bits +#define THOMSON_COMMAND_OFFSET 5 // skip 4 address bits + 1 toggle bit +#define THOMSON_COMMAND_LEN 7 // read 7 command bits +#define THOMSON_COMPLETE_DATA_LEN 12 // complete length +#define THOMSON_STOP_BIT 1 // has stop bit +#define THOMSON_LSB 0 // MSB...LSB +#define THOMSON_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * BOSE: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define BOSE_START_BIT_PULSE_TIME 1060.0e-6 // 1060 usec pulse +#define BOSE_START_BIT_PAUSE_TIME 1425.0e-6 // 1425 usec pause +#define BOSE_PULSE_TIME 550.0e-6 // 550 usec pulse +#define BOSE_1_PAUSE_TIME 1425.0e-6 // 1425 usec pause +#define BOSE_0_PAUSE_TIME 437.0e-6 // 437 usec pause +#define BOSE_FRAMES 1 +#define BOSE_AUTO_REPETITION_PAUSE_TIME 40.0e-3 // repetition after 40ms? +#define BOSE_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40ms? +#define BOSE_ADDRESS_OFFSET 0 // skip 0 bits +#define BOSE_ADDRESS_LEN 0 // read 16 address bits +#define BOSE_COMMAND_OFFSET 0 // skip 16 bits (8 address + 8 /address) +#define BOSE_COMMAND_LEN 16 // read 16 bits (8 command + 8 /command) +#define BOSE_COMPLETE_DATA_LEN 16 // complete length +#define BOSE_STOP_BIT 1 // has stop bit +#define BOSE_LSB 1 // LSB...MSB +#define BOSE_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * A1TVBOX: + * In reality A1 TV Box has no start bit with 300/340 usec. There are 2 start bits "10" with 250us pulse + 150us pause + 150us pause + 250us pulse + * This is not very easy to detect, because 1st and 2nd pause of both start bits are closely spaced. + * So IRMP looks for pseudo start bit with 300/340 usec and ignores the second half of the 2nd bit (250us pulse) + * This method only works because the first data bit (which is the 3rd bit) following is always "1": + * IRMP treats the first "long" pulse (250us of 2nd start bit + 250us of 1st data bit) of this "1" as a first _short_ pulse. + * This is a bug in IRMP's manchester decoder, but a good feature here ;-) + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define A1TVBOX_START_BIT_PULSE_TIME 300.0e-6 // 300 usec pulse +#define A1TVBOX_START_BIT_PAUSE_TIME 340.0e-6 // 340 usec pause +#define A1TVBOX_BIT_PULSE_TIME 250.0e-6 // 250 usec pulse +#define A1TVBOX_BIT_PAUSE_TIME 150.0e-6 // 150 usec pulse +#define A1TVBOX_STOP_BIT 0 // has no stop bit +#define A1TVBOX_LSB 0 // MSB...LSB +#define A1TVBOX_FLAGS (IRMP_PARAM_FLAG_IS_MANCHESTER | IRMP_PARAM_FLAG_1ST_PULSE_IS_1 ) // flags +#define A1TVBOX_FRAMES 1 // A1TVBOX sends each frame 1 times +#define A1TVBOX_ADDRESS_OFFSET 1 // skip 1 bits +#define A1TVBOX_ADDRESS_LEN 8 // read 8 address bits +#define A1TVBOX_COMMAND_OFFSET 9 // skip 9 bits (start bit + address) +#define A1TVBOX_COMMAND_LEN 8 // read 8 command bits +#define A1TVBOX_COMPLETE_DATA_LEN 17 // complete length incl. start bit +#define A1TVBOX_FRAME_REPEAT_PAUSE_TIME 50.0e-3 // 50 msec pause between frames, don't know if it is correct + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * MERLIN: + * See notes for A1TVBOX + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define MERLIN_START_BIT_PULSE_TIME 210.0e-6 // 210 usec pulse +#define MERLIN_START_BIT_PAUSE_TIME 420.0e-6 // 429 usec pause +#define MERLIN_BIT_PULSE_TIME 210.0e-6 // 210 usec pulse +#define MERLIN_BIT_PAUSE_TIME 210.0e-6 // 210 usec pulse +#define MERLIN_STOP_BIT 0 // has no stop bit +#define MERLIN_LSB 0 // MSB...LSB +#define MERLIN_FLAGS (IRMP_PARAM_FLAG_IS_MANCHESTER | IRMP_PARAM_FLAG_1ST_PULSE_IS_1 ) // flags +#define MERLIN_FRAMES 1 // MERLIN sends each frame 1 times +#define MERLIN_ADDRESS_OFFSET 2 // skip 1 bits +#define MERLIN_ADDRESS_LEN 9 // read 9 address bits +#define MERLIN_COMMAND_OFFSET 11 // skip 11 bits (start bit + address) +#define MERLIN_COMMAND_LEN 16 // read up to 16 command bits (could be up to 32) +#define MERLIN_COMPLETE_DATA_LEN 27 // complete length incl. start bit +#define MERLIN_FRAME_REPEAT_PAUSE_TIME 50.0e-3 // 50 msec pause between frames, don't know if it is correct + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * ORTEK (Hama): 6 address bits + 2 frame type bits + 6 command bits + 1 parity bit + 1 unknown bit + "1" + "0" + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define ORTEK_START_BIT_PULSE_TIME 2000.0e-6 // 2000 usec pulse +#define ORTEK_START_BIT_PAUSE_TIME 1000.0e-6 // 1000 usec pause +#define ORTEK_BIT_TIME 500.0e-6 // 500 usec pulse/pause +#define ORTEK_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms +#define ORTEK_ADDRESS_OFFSET 0 // skip 0 bits +#define ORTEK_ADDRESS_LEN 8 // read 6 address bits + 2 special bits +#define ORTEK_COMMAND_OFFSET 8 // skip 6 address bits + 2 special bits +#define ORTEK_COMMAND_LEN 6 // read 6 command bits +#define ORTEK_COMPLETE_DATA_LEN 18 // complete length +#define ORTEK_STOP_BIT 0 // has no stop bit +#define ORTEK_LSB 0 // MSB...LSB +#define ORTEK_FLAGS (IRMP_PARAM_FLAG_IS_MANCHESTER | IRMP_PARAM_FLAG_1ST_PULSE_IS_1) // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * TELEFUNKEN: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define TELEFUNKEN_START_BIT_PULSE_TIME 600.0e-6 // 600 usec pulse +#define TELEFUNKEN_START_BIT_PAUSE_TIME 1500.0e-6 // 1500 usec pause +#define TELEFUNKEN_PULSE_TIME 600.0e-6 // 600 usec pulse +#define TELEFUNKEN_1_PAUSE_TIME 1500.0e-6 // 1500 usec pause +#define TELEFUNKEN_0_PAUSE_TIME 600.0e-6 // 600 usec pause +#define TELEFUNKEN_FRAME_REPEAT_PAUSE_TIME 22.0e-3 // frame repeat after XX ms ????? +#define TELEFUNKEN_ADDRESS_OFFSET 0 // skip 0 bits +#define TELEFUNKEN_ADDRESS_LEN 0 // read 0 address bits +#define TELEFUNKEN_COMMAND_OFFSET 0 // skip 0 bits +#define TELEFUNKEN_COMMAND_LEN 15 // read 15 bits +#define TELEFUNKEN_COMPLETE_DATA_LEN 15 // complete length +#define TELEFUNKEN_STOP_BIT 1 // has stop bit +#define TELEFUNKEN_LSB 0 // LSB...MSB +#define TELEFUNKEN_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * ROOMBA + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define ROOMBA_START_BIT_PULSE_TIME 2790.0e-6 // 2790 usec pulse +#define ROOMBA_START_BIT_PAUSE_TIME 930.0e-6 // 930 usec pause +#define ROOMBA_0_PULSE_TIME 930.0e-6 // 930 usec pulse +#define ROOMBA_1_PULSE_TIME 2790.0e-6 // 2790 usec pulse +#define ROOMBA_0_PAUSE_TIME 2790.0e-6 // 2790 usec pause +#define ROOMBA_1_PAUSE_TIME 930.0e-6 // 930 usec pause +#define ROOMBA_FRAME_REPEAT_PAUSE_TIME 18.0e-3 // frame repeat after 18ms +#define ROOMBA_ADDRESS_OFFSET 0 // skip 0 bits +#define ROOMBA_ADDRESS_LEN 0 // read 0 address bits +#define ROOMBA_COMMAND_OFFSET 0 // skip 0 bits +#define ROOMBA_COMMAND_LEN 7 // read 7 bits +#define ROOMBA_COMPLETE_DATA_LEN 7 // complete length +#define ROOMBA_STOP_BIT 0 // has stop bit (fm: sure?) +#define ROOMBA_LSB 0 // MSB...LSB +#define ROOMBA_FLAGS 0 // flags +#define ROOMBA_FRAMES 8 // ROOMBA sends 8 frames (this is a lie, but more comfortable) + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * RC-MM (32, 24, or 12 bit) + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define RCMM32_START_BIT_PULSE_TIME 500.0e-6 // 500 usec pulse +#define RCMM32_START_BIT_PAUSE_TIME 220.0e-6 // 220 usec pause +#define RCMM32_PULSE_TIME 230.0e-6 // 230 usec pulse +#define RCMM32_00_PAUSE_TIME 220.0e-6 // 220 usec pause +#define RCMM32_01_PAUSE_TIME 370.0e-6 // 370 usec pause +#define RCMM32_10_PAUSE_TIME 540.0e-6 // 540 usec pause +#define RCMM32_11_PAUSE_TIME 720.0e-6 // 720 usec pause + +#define RCMM32_FRAME_REPEAT_PAUSE_TIME 80.0e-3 // frame repeat after 80 ms +#define RCMM32_ADDRESS_OFFSET 0 // skip 0 bits +#define RCMM32_ADDRESS_LEN 16 // read 16 address bits +#define RCMM32_COMMAND_OFFSET 17 // skip 17 bits +#define RCMM32_COMMAND_LEN 15 // read 15 bits +#define RCMM32_COMPLETE_DATA_LEN 32 // complete length +#define RCMM32_STOP_BIT 1 // has stop bit +#define RCMM32_LSB 0 // LSB...MSB +#define RCMM32_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * PENTAX: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define PENTAX_START_BIT_PULSE_TIME 13000.0e-6 // 13 msec pulse +#define PENTAX_START_BIT_PAUSE_TIME 3000.0e-6 // 3 msec pause +#define PENTAX_PULSE_TIME 1000.0e-6 // 1 msec pulse +#define PENTAX_1_PAUSE_TIME 3000.0e-6 // 3 msec pause +#define PENTAX_0_PAUSE_TIME 1000.0e-6 // 1 msec pause +#define PENTAX_FRAME_REPEAT_PAUSE_TIME 60.0e-3 // frame repeat after 60ms +#define PENTAX_ADDRESS_OFFSET 0 // skip 0 bits +#define PENTAX_ADDRESS_LEN 0 // read 0 address bits +#define PENTAX_COMMAND_OFFSET 0 // skip 0 bits +#define PENTAX_COMMAND_LEN 6 // read 6 bits +#define PENTAX_COMPLETE_DATA_LEN 6 // complete length +#define PENTAX_STOP_BIT 1 // has stop bit +#define PENTAX_LSB 0 // LSB...MSB +#define PENTAX_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * ACP24: Stiebel Eltron ACP24 air conditioner + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define ACP24_START_BIT_PULSE_TIME 390.0e-6 // 390 usec pulse +#define ACP24_START_BIT_PAUSE_TIME 950.0e-6 // 950 usec pause +#define ACP24_PULSE_TIME 390.0e-6 // 390 usec pulse +#define ACP24_1_PAUSE_TIME 1300.0e-6 // 1300 usec pause +#define ACP24_0_PAUSE_TIME 950.0e-6 // 950 usec pause +#define ACP24_FRAME_REPEAT_PAUSE_TIME 22.0e-3 // frame repeat after 22ms? +#define ACP24_ADDRESS_OFFSET 0 // skip 0 bits +#define ACP24_ADDRESS_LEN 0 // read 6 address bits +#define ACP24_COMMAND_OFFSET 0 // skip 6 bits +#define ACP24_COMMAND_LEN 0 // read 0 bits (70 bits will be read and compressed by special routine) +#define ACP24_COMPLETE_DATA_LEN 70 // complete length +#define ACP24_STOP_BIT 1 // has stop bit +#define ACP24_LSB 0 // LSB...MSB +#define ACP24_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * IRMP16: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define IRMP16_START_BIT_PULSE_TIME 842.0e-6 // 842 usec pulse (32 x 1/38kHz) +#define IRMP16_START_BIT_PAUSE_TIME 1052.0e-6 // 1052 usec pause (40 x 1/38kHz) +#define IRMP16_PULSE_TIME 421.0e-6 // 421 usec pulse (16 x 1/38kHz) +#define IRMP16_1_PAUSE_TIME 842.0e-6 // 842 usec pause (32 x 1/38kHz) +#define IRMP16_0_PAUSE_TIME 421.0e-6 // 421 usec pause (16 x 1/38kHz) +#define IRMP16_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40ms +#define IRMP16_ADDRESS_OFFSET 0 // skip 0 bits +#define IRMP16_ADDRESS_LEN 0 // read 0 address bits +#define IRMP16_COMMAND_OFFSET 0 // skip 0 bits +#define IRMP16_COMMAND_LEN 16 // read 16 bits (12 command + 4 CRC) +#define IRMP16_COMPLETE_DATA_LEN 16 // complete length +#define IRMP16_STOP_BIT 1 // has stop bit +#define IRMP16_LSB 1 // LSB...MSB +#define IRMP16_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * GREE - climate: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define GREE_START_BIT_PULSE_TIME 12000.0e-6 // 12000 usec pulse (32 x 1/38kHz) +#define GREE_START_BIT_PAUSE_TIME 6000.0e-6 // 6000 usec pause (40 x 1/38kHz) +#define GREE_PULSE_TIME 900.0e-6 // 900 usec pulse (16 x 1/38kHz) +#define GREE_1_PAUSE_TIME 700.0e-6 // 700 usec pause (32 x 1/38kHz) +#define GREE_0_PAUSE_TIME 2100.0e-6 // 2100 usec pause (16 x 1/38kHz) +#define GREE_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40ms +#define GREE_ADDRESS_OFFSET 0 // skip 0 bits +#define GREE_ADDRESS_LEN 16 // read 16 address bits +#define GREE_COMMAND_OFFSET 16 // skip 16 bits +#define GREE_COMMAND_LEN 16 // read 16 bits +#define GREE_COMPLETE_DATA_LEN 32 // complete length +#define GREE_STOP_BIT 1 // has stop bit +#define GREE_LSB 1 // LSB...MSB +#define GREE_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * METZ: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define METZ_START_BIT_PULSE_TIME 870.0e-6 // 870 usec pulse +#define METZ_START_BIT_PAUSE_TIME 2300.0e-6 // 2300 usec pause +#define METZ_PULSE_TIME 435.0e-6 // 435 usec pulse +#define METZ_1_PAUSE_TIME 1680.0e-6 // 1680 usec pause +#define METZ_0_PAUSE_TIME 960.0e-6 // 960 usec pause +#define METZ_FRAME_REPEAT_PAUSE_TIME 122.0e-3 // frame repeat after 122ms +#define METZ_ADDRESS_OFFSET 1 // skip 1 bit (toggle bit) +#define METZ_ADDRESS_LEN 6 // read 6 address bits +#define METZ_COMMAND_OFFSET 7 // skip 7 bits +#define METZ_COMMAND_LEN 13 // read 13 bits +#define METZ_COMPLETE_DATA_LEN 20 // complete length +#define METZ_STOP_BIT 0 // has no stop bit +#define METZ_LSB 0 // MSB...LSB +#define METZ_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * RF GEN24 generic remote control (Pollin 550666, EAN 4049702006022 and many other similar RF remote controls) + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define RF_GEN24_0_PULSE_TIME 400.0e-6 // 400 usec pulse +#define RF_GEN24_0_PAUSE_TIME 1066.0e-6 // 1066 usec pause +#define RF_GEN24_1_PULSE_TIME 1066.0e-6 // 1066 usec pulse +#define RF_GEN24_1_PAUSE_TIME 400.0e-6 // 400 usec pause + +#define RF_GEN24_FRAME_REPEAT_PAUSE_TIME 10.0e-3 // frame repeat after 10 msec +#define RF_GEN24_ADDRESS_OFFSET 0 // skip 0 bits +#define RF_GEN24_ADDRESS_LEN 10 // read 10 address bits +#define RF_GEN24_COMMAND_OFFSET 10 // skip 0 + 10 bits +#define RF_GEN24_COMMAND_LEN 14 // read 14 command bits +#define RF_GEN24_COMPLETE_DATA_LEN 24 // complete length +#define RF_GEN24_STOP_BIT 1 // has stop bit +#define RF_GEN24_LSB 0 // MSB...LSB +#define RF_GEN24_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * RF X10 remote control (MEDION, Pollin 721815) + * + * Frame: + * 1 toggle bit + 7 checksum bits + 1 toggle bit + 7 command bits + 4 channel bits + * + * Rule: + * checksum = (command + 0x0055 + (channel << 4)) & 0x7F + * + * Here we store checksum in address, command incl. 4 channel bits in command + * + * In irmp_get_data(): + * irmp_command = command << 4 + * irmp_address = channel + 1 + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define RF_X10_START_BIT_PULSE_TIME 2850.0e-6 // 2850 usec pulse +#define RF_X10_START_BIT_PAUSE_TIME 1710.0e-6 // 1710 usec pulse +#define RF_X10_0_PULSE_TIME 570.0e-6 // 570 usec pulse +#define RF_X10_0_PAUSE_TIME 570.0e-6 // 570 usec pause +#define RF_X10_1_PULSE_TIME 570.0e-6 // 570 usec pulse +#define RF_X10_1_PAUSE_TIME 1710.0e-6 // 1710 usec pause + +#define RF_X10_FRAME_REPEAT_PAUSE_TIME 4456.0e-6 // frame repeat after 4460 usec +#define RF_X10_ADDRESS_OFFSET 1 // skip 1st toggle bit +#define RF_X10_ADDRESS_LEN 7 // store 7 command bits in address +#define RF_X10_COMMAND_OFFSET 9 // skip 1st toggle bit + 7 command bits + 2nd toggle bit +#define RF_X10_COMMAND_LEN 11 // read 7 alternative command bits plus 4 0-bits +#define RF_X10_COMPLETE_DATA_LEN 20 // complete length +#define RF_X10_STOP_BIT 1 // has stop bit +#define RF_X10_LSB 0 // MSB...LSB +#define RF_X10_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * RF MEDION PC remote control (MEDION) + * + * Frame is simular to RF_X10, see above. Only the start bit timing differs. + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define RF_MEDION_START_BIT_PULSE_TIME 3960.0e-6 // 3960 usec pulse +#define RF_MEDION_START_BIT_PAUSE_TIME 610.0e-6 // 610 usec pulse +#define RF_MEDION_0_PULSE_TIME 570.0e-6 // 570 usec pulse +#define RF_MEDION_0_PAUSE_TIME 570.0e-6 // 570 usec pause +#define RF_MEDION_1_PULSE_TIME 570.0e-6 // 570 usec pulse +#define RF_MEDION_1_PAUSE_TIME 1710.0e-6 // 1710 usec pause + +#define RF_MEDION_FRAME_REPEAT_PAUSE_TIME 5000.0e-6 // frame repeat after 5000 usec +#define RF_MEDION_ADDRESS_OFFSET 1 // skip 1st toggle bit +#define RF_MEDION_ADDRESS_LEN 7 // store 7 command bits in address +#define RF_MEDION_COMMAND_OFFSET 9 // skip 1st toggle bit + 7 command bits + 2nd toggle bit +#define RF_MEDION_COMMAND_LEN 11 // read 7 alternative command bits plus 4 0-bits +#define RF_MEDION_COMPLETE_DATA_LEN 20 // complete length +#define RF_MEDION_STOP_BIT 1 // has stop bit +#define RF_MEDION_LSB 0 // MSB...LSB +#define RF_MEDION_FLAGS 0 // flags + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * Frame Repetitions: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define AUTO_FRAME_REPETITION_TIME 80.0e-3 // SIRCS/SAMSUNG32/NUBERT: automatic repetition after 25-50ms + +#endif // _IRMP_PROTOCOLS_H_ diff --git a/irmpsystem.h b/irmpsystem.h new file mode 100644 index 0000000..e9cc7bd --- /dev/null +++ b/irmpsystem.h @@ -0,0 +1,218 @@ +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * irmpsystem.h - system specific includes and defines + * + * Copyright (c) 2009-2020 Frank Meyer - frank(at)fli4l.de + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ + +#ifndef _IRMPSYSTEM_H_ +#define _IRMPSYSTEM_H_ + +#if !defined(_IRMP_H_) && !defined(_IRSND_H_) +# error please include only irmp.h or irsnd.h, not irmpsystem.h +#endif + +#if defined(__18CXX) // Microchip PIC C18 compiler +# define PIC_C18 +#elif defined(__XC8) // PIC XC8 compiler +# include +# define PIC_C18 +#elif defined(__XC32) // XC32 or ChipKit compiler +# define PIC_XC32 +#elif defined(__PCM__) || defined(__PCB__) || defined(__PCH__) // CCS PIC compiler +# define PIC_CCS +#elif defined(STM32L1XX_MD) || defined(STM32L1XX_MDP) || defined(STM32L1XX_HD) // ARM STM32 +# include +# define ARM_STM32 +# define ARM_STM32L1XX +# define F_CPU (SysCtlClockGet()) +#elif defined(STM32F10X_LD) || defined(STM32F10X_LD_VL) \ + || defined(STM32F10X_MD) || defined(STM32F10X_MD_VL) \ + || defined(STM32F10X_HD) || defined(STM32F10X_HD_VL) \ + || defined(STM32F10X_XL) || defined(STM32F10X_CL) // ARM STM32 +# include +# define ARM_STM32 +# define ARM_STM32F10X +# define F_CPU (SysCtlClockGet()) +#elif defined(STM32F30X) // ARM STM32 +# include +# define ARM_STM32 +# define ARM_STM32F30X +# define F_CPU (SysCtlClockGet()) +#elif defined(STM32F4XX) // ARM STM32 +# include +# define ARM_STM32 +# define ARM_STM32F4XX +# define F_CPU (SysCtlClockGet()) +#elif defined(USE_HAL_DRIVER) // ARM STM32 with HAL Library +# include "gpio.h" +# if defined(_IRSND_H_) +# include"tim.h" +# endif +# define ARM_STM32_HAL +# define F_CPU SystemCoreClock +#elif defined(__SDCC_stm8) // STM8 +# define SDCC_STM8 +#elif defined(TARGET_IS_BLIZZARD_RA2) // TI Stellaris (tested on Stellaris Launchpad with Code Composer Studio) +# define STELLARIS_ARM_CORTEX_M4 +# define F_CPU (SysCtlClockGet()) +#elif defined(__xtensa__) // ESP8266 (Arduino) +# include "Arduino.h" +# include "ets_sys.h" +# include "osapi.h" +# include "gpio.h" +# include "os_type.h" +# include "c_types.h" +# define uint_fast8_t uint8_t +# define uint_fast16_t uint16_t +#elif defined(TEENSYDUINO) && (defined(__MK20DX256__) || defined(__MK20DX128__)) // Teensy 3.x (tested on Teensy 3.1 in Arduino 1.6.5 / Teensyduino 1.2.5) +# include +# define TEENSY_ARM_CORTEX_M4 +#elif defined(unix) || defined(WIN32) || defined(__APPLE__) // Unix/Linux or Windows or Apple +# define UNIX_OR_WINDOWS +#elif defined(__MBED__) // mbed platform +// #include "mbed.h" // if mbed.h is used, source must be compiled as cpp +#include "gpio_api.h" +#elif defined(IRMP_CHIBIOS_HAL) // ChibiOS HAL +# include "hal.h" +#else +# define ATMEL_AVR // ATMEL AVR +#endif + +#include + +#ifdef UNIX_OR_WINDOWS // Analyze on Unix/Linux or Windows +# include +# include +# define F_CPU 8000000L +# define ANALYZE +# include +# ifdef _MSC_VER +# define IRMP_PACKED_STRUCT +# endif +#endif + +#if defined(ATMEL_AVR) +# include +# include +# include +# include +# include +# include +# define IRSND_OC2 0 // OC2 +# define IRSND_OC2A 1 // OC2A +# define IRSND_OC2B 2 // OC2B +# define IRSND_OC0 3 // OC0 +# define IRSND_OC0A 4 // OC0A +# define IRSND_OC0B 5 // OC0B + +# define IRSND_XMEGA_OC0A 0 // OC0A +# define IRSND_XMEGA_OC0B 1 // OC0B +# define IRSND_XMEGA_OC0C 2 // OC0C +# define IRSND_XMEGA_OC0D 3 // OC0D +# define IRSND_XMEGA_OC1A 4 // OC1A +# define IRSND_XMEGA_OC1B 5 // OC1B + +#elif defined(STELLARIS_ARM_CORTEX_M4) + +# include "inc/hw_ints.h" +# include "inc/hw_memmap.h" +# include "inc/hw_types.h" +# include "inc/hw_gpio.h" +# include "driverlib/fpu.h" +# include "driverlib/sysctl.h" +# include "driverlib/interrupt.h" +# include "driverlib/gpio.h" +# include "driverlib/rom.h" +# include "driverlib/systick.h" +# include "driverlib/pin_map.h" +# include "driverlib/timer.h" +# define PROGMEM +# define memcpy_P memcpy +# define APP_SYSTICKS_PER_SEC 32 + +#elif defined(ARM_STM32F10X) + +# include "stm32f10x_gpio.h" +# include "stm32f10x_rcc.h" +# include "stm32f10x_tim.h" +# include "misc.h" +# define PROGMEM +# define memcpy_P memcpy + +#elif defined(SDCC_STM8) + +# include "stm8s.h" +# define PROGMEM +# define memcpy_P memcpy +# define __attribute__(x) +# define uint_fast8_t uint8_t +# define uint_fast16_t uint16_t + +#elif defined(TEENSY_ARM_CORTEX_M4) +# define PROGMEM +# define memcpy_P memcpy + +#elif defined(__xtensa__) +# define PROGMEM +# define memcpy_P memcpy + +#elif defined(__MBED__) +# define PROGMEM +# define memcpy_P memcpy + +#else +# define PROGMEM +# define memcpy_P memcpy + +#endif + +#if defined(PIC_CCS) || defined(PIC_C18) +typedef unsigned char uint8_t; +typedef unsigned short uint16_t; +typedef unsigned char uint_fast8_t; +typedef unsigned short uint_fast16_t; +#endif + +#if defined (PIC_C18) // PIC C18 or XC8 compiler +# include // main PIC18 h file +#ifndef __XC8 +# include // timer lib +# include // pwm lib +#endif +# define IRSND_PIC_CCP1 1 // PIC C18 RC2 = PWM1 module +# define IRSND_PIC_CCP2 2 // PIC C18 RC1 = PWM2 module +#endif + +#ifndef TRUE +# define TRUE 1 +# define FALSE 0 +#endif + +#if defined(PIC_XC32) // XC32 or ChipKit compiler +# include +# include +#endif + +#if defined(PIC_C18) +# define IRMP_PACKED_STRUCT +#else +# ifndef IRMP_PACKED_STRUCT +# define IRMP_PACKED_STRUCT __attribute__ ((__packed__)) +# endif +#endif + +typedef struct IRMP_PACKED_STRUCT +{ + uint8_t protocol; // protocol, e.g. NEC_PROTOCOL + uint16_t address; // address + uint16_t command; // command + uint8_t flags; // flags, e.g. repetition +} IRMP_DATA; + +#endif // _IRMPSYSTEM_H_ diff --git a/irsnd-main-avr.c b/irsnd-main-avr.c new file mode 100644 index 0000000..692f45c --- /dev/null +++ b/irsnd-main-avr.c @@ -0,0 +1,156 @@ +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * irsnd-main-avr.c - demo main module to test IRSND encoder on AVRs + * + * Copyright (c) 2010-2020 Frank Meyer - frank(at)fli4l.de + * + * ATMEGA88 @ 8 MHz internal RC Osc with BODLEVEL 4.3V: lfuse: 0xE2 hfuse: 0xDC efuse: 0xF9 + * ATMEGA88 @ 8 MHz external Crystal Osc with BODLEVEL 4.3V: lfuse: 0xFF hfuse: 0xDC efuse: 0xF9 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#include "irsnd.h" + +#ifndef F_CPU +# error F_CPU unknown +#endif + +void +timer1_init (void) +{ +#if defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45 / ATtiny85: + OCR1C = (F_CPU / F_INTERRUPTS / 4) - 1; // compare value: 1/15000 of CPU frequency, presc = 4 + TCCR1 = (1 << CTC1) | (1 << CS11) | (1 << CS10); // switch CTC Mode on, set prescaler to 4 +#else // ATmegaXX: + OCR1A = (F_CPU / F_INTERRUPTS) - 1; // compare value: 1/15000 of CPU frequency + TCCR1B = (1 << WGM12) | (1 << CS10); // switch CTC Mode on, set prescaler to 1 +#endif + +#ifdef TIMSK1 + TIMSK1 = 1 << OCIE1A; // OCIE1A: Interrupt by timer compare +#else + TIMSK = 1 << OCIE1A; // OCIE1A: Interrupt by timer compare +#endif +} + +#ifdef TIM1_COMPA_vect // ATtiny84 +#define COMPA_VECT TIM1_COMPA_vect +#else +#define COMPA_VECT TIMER1_COMPA_vect // ATmega +#endif + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * timer 1 compare handler, called every 1/10000 sec + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +ISR(COMPA_VECT) // Timer1 output compare A interrupt service routine, called every 1/15000 sec +{ + (void) irsnd_ISR(); // call irsnd ISR + // call other timer interrupt routines here... +} + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * MAIN: main routine + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +int +main (void) +{ + IRMP_DATA irmp_data; + + irsnd_init(); // initialize irsnd + timer1_init(); // initialize timer + sei (); // enable interrupts + + + DDRA = 0x00; + PORTA = 0xFF; + + DDRB = 0xFF; + PORTB = 0xFF; + + irmp_data.protocol = IRMP_RC6_PROTOCOL; // use NEC protocol + irmp_data.flags = 0; // don't repeat frame + // + for (;;) + { + //önöff + if(~PINA & (1<<0)){ + PORTB &= ~0x01; + irmp_data.address = 0x0000; // set address to 0x00FF + irmp_data.command = 0x000C; // set command to 0x0001 + irsnd_send_data (&irmp_data, TRUE); // send frame, wait for completion + _delay_ms (200); + PORTB |= 0x01; + } + + //OK + if(~PINA & (1<<1)){ + PORTB &= ~(1<<1); + irmp_data.address = 0x0000; // set address to 0x00FF + irmp_data.command = 0x005C; // set command to 0x0001 + irsnd_send_data (&irmp_data, TRUE); // send frame, wait for completion + _delay_ms (200); + PORTB |= 1<<1; + } + + //ambi + if(~PINA & (1<<2)){ + PORTB &= ~(1<<2); + irmp_data.address = 0x0000; // set address to 0x00FF + irmp_data.command = 0x000A; // set command to 0x0001 + irsnd_send_data (&irmp_data, TRUE); // send frame, wait for completion + _delay_ms (200); + PORTB |= 1<<2; + } + + //rechts + if(~PINA & (1<<3)){ + PORTB &= ~(1<<3); + irmp_data.address = 0x0000; // set address to 0x00FF + irmp_data.command = 0x005B; // set command to 0x0001 + irsnd_send_data (&irmp_data, TRUE); // send frame, wait for completion + _delay_ms (200); + PORTB |= 1<<3; + } + //links + if(~PINA & (1<<4)){ + PORTB &= ~(1<<4); + irmp_data.address = 0x0000; // set address to 0x00FF + irmp_data.command = 0x005A; // set command to 0x0001 + irsnd_send_data (&irmp_data, TRUE); // send frame, wait for completion + _delay_ms (200); + PORTB |= 1<<4; + } + //runter + if(~PINA & (1<<5)){ + PORTB &= ~(1<<5); + irmp_data.address = 0x0000; // set address to 0x00FF + irmp_data.command = 0x0059; // set command to 0x0001 + irsnd_send_data (&irmp_data, TRUE); // send frame, wait for completion + _delay_ms (200); + PORTB |= 1<<5; + } + //hoch + if(~PINA & (1<<6)){ + PORTB &= ~(1<<6); + irmp_data.address = 0x0000; // set address to 0x00FF + irmp_data.command = 0x0058; // set command to 0x0001 + irsnd_send_data (&irmp_data, TRUE); // send frame, wait for completion + _delay_ms (200); + PORTB |= 1<<6; + } + //Menu + if(~PINA & (1<<7)){ + PORTB &= ~(1<<7); + irmp_data.address = 0x0000; // set address to 0x00FF + irmp_data.command = 0x0057; // set command to 0x0001 + irsnd_send_data (&irmp_data, TRUE); // send frame, wait for completion + _delay_ms (200); + PORTB |= 1<<7; + } + } +} diff --git a/irsnd.c b/irsnd.c new file mode 100644 index 0000000..6dc69f5 --- /dev/null +++ b/irsnd.c @@ -0,0 +1,3287 @@ +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * @file irsnd.c + * + * Copyright (c) 2010-2020 Frank Meyer - frank(at)fli4l.de + * + * Supported AVR mikrocontrollers: + * + * ATtiny87, ATtiny167 + * ATtiny45, ATtiny85 + * ATtiny44 ATtiny84 + * ATtiny2313 ATtiny4313 + * ATmega8, ATmega16, ATmega32 + * ATmega162 + * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P + * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ + +#include "irsnd.h" + +#ifndef F_CPU +# error F_CPU unkown +#endif + +#define IRMP_NEC_REPETITION_PROTOCOL 0xFF // pseudo protocol: NEC repetition frame + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * ATtiny pin definition of OC0A / OC0B + * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#if defined (__AVR_ATtiny44__) || defined (__AVR_ATtiny84__) // ATtiny44/84 uses OC0A = PB2 or OC0B = PA7 +# if IRSND_OCx == IRSND_OC0A // OC0A +# define IRSND_PORT_LETTER B +# define IRSND_BIT_NUMBER 2 +# elif IRSND_OCx == IRSND_OC0B // OC0B +# define IRSND_PORT_LETTER A +# define IRSND_BIT_NUMBER 7 +# else +# error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h +# endif // IRSND_OCx + +#elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1 +# if IRSND_OCx == IRSND_OC0A // OC0A +# define IRSND_PORT_LETTER B +# define IRSND_BIT_NUMBER 0 +# elif IRSND_OCx == IRSND_OC0B // OC0B +# define IRSND_PORT_LETTER B +# define IRSND_BIT_NUMBER 1 +# else +# error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h +# endif // IRSND_OCx + +#elif defined (__AVR_ATtiny2313__) || defined (__AVR_ATtiny4313__) // ATtiny2313/4313 uses OC0A = PB2 or OC0B = PD5 +# if IRSND_OCx == IRSND_OC0A // OC0A +# define IRSND_PORT_LETTER B +# define IRSND_BIT_NUMBER 2 +# elif IRSND_OCx == IRSND_OC0B // OC0B +# define IRSND_PORT_LETTER D +# define IRSND_BIT_NUMBER 5 +# else +# error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h +# endif // IRSND_OCx + +#elif defined (__AVR_ATtiny87__) || defined (__AVR_ATtiny167__) // ATtiny87/167 uses OC0A = PA2 +# if IRSND_OCx == IRSND_OC0A // OC0A +# define IRSND_PORT_LETTER A +# define IRSND_BIT_NUMBER 2 +# else +# error Wrong value for IRSND_OCx, choose IRSND_OC0A in irsndconfig.h +# endif // IRSND_OCx + +#elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3 +# if IRSND_OCx == IRSND_OC2 // OC2 +# define IRSND_PORT_LETTER B +# define IRSND_BIT_NUMBER 3 +# else +# error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h +# endif // IRSND_OCx +#elif defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) // ATmega16|32 uses OC0 = PB3 or OC2 = PD7 +# if IRSND_OCx == IRSND_OC2 // OC2 +# define IRSND_PORT_LETTER D +# define IRSND_BIT_NUMBER 7 +# elif IRSND_OCx == IRSND_OC0 // OC0 +# define IRSND_PORT_LETTER B +# define IRSND_BIT_NUMBER 3 +# else +# error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h +# endif // IRSND_OCx + +#elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0 +# if IRSND_OCx == IRSND_OC2 // OC2 +# define IRSND_PORT_LETTER B +# define IRSND_BIT_NUMBER 1 +# elif IRSND_OCx == IRSND_OC0 // OC0 +# define IRSND_PORT_LETTER B +# define IRSND_BIT_NUMBER 0 +# else +# error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h +# endif // IRSND_OCx + +#elif defined (__AVR_ATmega164__) \ + || defined (__AVR_ATmega324__) \ + || defined (__AVR_ATmega644__) \ + || defined (__AVR_ATmega644P__) \ + || defined (__AVR_ATmega1284__) \ + || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4 +# if IRSND_OCx == IRSND_OC2A // OC2A +# define IRSND_PORT_LETTER D +# define IRSND_BIT_NUMBER 7 +# elif IRSND_OCx == IRSND_OC2B // OC2B +# define IRSND_PORT_LETTER D +# define IRSND_BIT_NUMBER 6 +# elif IRSND_OCx == IRSND_OC0A // OC0A +# define IRSND_PORT_LETTER B +# define IRSND_BIT_NUMBER 3 +# elif IRSND_OCx == IRSND_OC0B // OC0B +# define IRSND_PORT_LETTER B +# define IRSND_BIT_NUMBER 4 +# else +# error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h +# endif // IRSND_OCx + +#elif defined (__AVR_ATmega48__) \ + || defined (__AVR_ATmega88__) \ + || defined (__AVR_ATmega88P__) \ + || defined (__AVR_ATmega168__) \ + || defined (__AVR_ATmega168P__) \ + || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5 +# if IRSND_OCx == IRSND_OC2A // OC2A +# define IRSND_PORT_LETTER B +# define IRSND_BIT_NUMBER 3 +# elif IRSND_OCx == IRSND_OC2B // OC2B +# define IRSND_PORT_LETTER D +# define IRSND_BIT_NUMBER 3 +# elif IRSND_OCx == IRSND_OC0A // OC0A +# define IRSND_PORT_LETTER D +# define IRSND_BIT_NUMBER 6 +# elif IRSND_OCx == IRSND_OC0B // OC0B +# define IRSND_PORT_LETTER D +# define IRSND_BIT_NUMBER 5 +# else +# error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h +# endif // IRSND_OCx + +#elif defined (__AVR_ATmega8515__) // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2 +# if IRSND_OCx == IRSND_OC0 +# define IRSND_PORT_LETTER B +# define IRSND_BIT_NUMBER 0 +# elif IRSND_OCx == IRSND_OC1A +# define IRSND_PORT_LETTER D +# define IRSND_BIT_NUMBER 5 +# elif IRSND_OCx == IRSND_OC1B +# define IRSND_PORT_LETTER E +# define IRSND_BIT_NUMBER 2 +# endif // IRSND_OCx + +#elif defined (__AVR_XMEGA__) // ATxmega +# if IRSND_OCx == IRSND_XMEGA_OC0A +# define IRSND_BIT_NUMBER 0 +# elif IRSND_OCx == IRSND_XMEGA_OC0B +# define IRSND_BIT_NUMBER 1 +# elif IRSND_OCx == IRSND_XMEGA_OC0C +# define IRSND_BIT_NUMBER 2 +# elif IRSND_OCx == IRSND_XMEGA_OC0D +# define IRSND_BIT_NUMBER 3 +# elif IRSND_OCx == IRSND_XMEGA_OC1A +# define IRSND_BIT_NUMBER 4 +# elif IRSND_OCx == IRSND_XMEGA_OC1B +# define IRSND_BIT_NUMBER 5 +# else +# error Wrong value for IRSND_OCx, choose IRSND_XMEGA_OC0A, IRSND_XMEGA_OC0B, IRSND_XMEGA_OC0C, IRSND_XMEGA_OC0D, IRSND_XMEGA_OC1A, or IRSND_XMEGA_OC1B in irsndconfig.h +# endif // IRSND_OCx + +#elif defined (PIC_C18) // Microchip C18 compiler + //Nothing here to do here -> See irsndconfig.h +#elif defined (ARM_STM32) // STM32 + //Nothing here to do here -> See irsndconfig.h +#elif defined (ARM_STM32_HAL) // STM32 with Hal Library + //Nothing here to do here -> See irsndconfig.h +#elif defined (__xtensa__) // ESP8266 + //Nothing here to do here -> See irsndconfig.h + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * Macro digitalPinHasPWM bothers PIC_C18 compiler, but why? + * + * #elif defined (TEENSY_ARM_CORTEX_M4) // Teensy3 + * # if !digitalPinHasPWM(IRSND_PIN) + * # error need pin with PWM output. + * # endif + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ + + #elif defined(ARDUINO) +// specified here to avoid else case + +#else +# if !defined (unix) && !defined (WIN32) +# error mikrocontroller not defined, please fill in definitions here. +# endif // unix, WIN32 +#endif // __AVR... + +#if defined(__AVR_XMEGA__) +# define _CONCAT(a,b) a##b +# define CONCAT(a,b) _CONCAT(a,b) +# define IRSND_PORT IRSND_PORT_PRE.OUT +# define IRSND_DDR IRSND_PORT_PRE.DIR +# define IRSND_PIN IRSND_PORT_PRE.IN +# define IRSND_BIT IRSND_BIT_NUMBER +#elif defined(ATMEL_AVR) +# define _CONCAT(a,b) a##b +# define CONCAT(a,b) _CONCAT(a,b) +# define IRSND_PORT CONCAT(PORT, IRSND_PORT_LETTER) +# define IRSND_DDR CONCAT(DDR, IRSND_PORT_LETTER) +# define IRSND_BIT IRSND_BIT_NUMBER +#endif + +#if IRSND_SUPPORT_NIKON_PROTOCOL == 1 + typedef uint16_t IRSND_PAUSE_LEN; +#else + typedef uint8_t IRSND_PAUSE_LEN; +#endif + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * IR timings + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#define IRSND_SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5) +#define IRSND_SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5) +#define IRSND_SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5) +#define IRSND_SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5) +#define IRSND_SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t! +#define IRSND_SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5) +#define IRSND_NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5) +#define IRSND_NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5) +#define IRSND_NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5) +#define IRSND_NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_MELINERA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MELINERA_START_BIT_PULSE_TIME + 0.5) +#define IRSND_MELINERA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MELINERA_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_MELINERA_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MELINERA_REPEAT_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_MELINERA_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * MELINERA_1_PULSE_TIME + 0.5) +#define IRSND_MELINERA_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * MELINERA_0_PULSE_TIME + 0.5) +#define IRSND_MELINERA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MELINERA_1_PAUSE_TIME + 0.5) +#define IRSND_MELINERA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MELINERA_0_PAUSE_TIME + 0.5) +#define IRSND_MELINERA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MELINERA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5) +#define IRSND_SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5) +#define IRSND_SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5) +#define IRSND_SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5) +#define IRSND_SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t! +#define IRSND_SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_SAMSUNG48_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG48_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t! +#define IRSND_SAMSUNG48_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG48_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5) +#define IRSND_MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5) +#define IRSND_MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5) +#define IRSND_MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5) +#define IRSND_MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5) +#define IRSND_KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5) +#define IRSND_KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5) +#define IRSND_KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5) +#define IRSND_KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t! +#define IRSND_KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_PANASONIC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_START_BIT_PULSE_TIME + 0.5) +#define IRSND_PANASONIC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_PANASONIC_PULSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_PULSE_TIME + 0.5) +#define IRSND_PANASONIC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_1_PAUSE_TIME + 0.5) +#define IRSND_PANASONIC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_0_PAUSE_TIME + 0.5) +#define IRSND_PANASONIC_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * PANASONIC_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t! +#define IRSND_PANASONIC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * PANASONIC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_MITSU_HEAVY_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MITSU_HEAVY_START_BIT_PULSE_TIME + 0.5) +#define IRSND_MITSU_HEAVY_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MITSU_HEAVY_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_MITSU_HEAVY_PULSE_LEN (uint8_t)(F_INTERRUPTS * MITSU_HEAVY_PULSE_TIME + 0.5) +#define IRSND_MITSU_HEAVY_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MITSU_HEAVY_1_PAUSE_TIME + 0.5) +#define IRSND_MITSU_HEAVY_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MITSU_HEAVY_0_PAUSE_TIME + 0.5) +#define IRSND_MITSU_HEAVY_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MITSU_HEAVY_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5) +#define IRSND_RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5) +#define IRSND_RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5) +#define IRSND_RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5) +#define IRSND_RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5) +#define IRSND_RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5) +#define IRSND_RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5) +#define IRSND_RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5) +#define IRSND_RC6_BIT_2_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_2_TIME + 0.5) +#define IRSND_RC6_BIT_3_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_3_TIME + 0.5) +#define IRSND_RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5) +#define IRSND_DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5) +#define IRSND_DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5) +#define IRSND_DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t! +#define IRSND_DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5) +#define IRSND_THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5) +#define IRSND_THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5) +#define IRSND_THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t! +#define IRSND_THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5) +#define IRSND_RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5) +#define IRSND_RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5) +#define IRSND_RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5) +#define IRSND_RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_TELEFUNKEN_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PULSE_TIME + 0.5) +#define IRSND_TELEFUNKEN_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_TELEFUNKEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_PULSE_TIME + 0.5) +#define IRSND_TELEFUNKEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_1_PAUSE_TIME + 0.5) +#define IRSND_TELEFUNKEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_0_PAUSE_TIME + 0.5) +#define IRSND_TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t! +#define IRSND_TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_BOSE_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * BOSE_START_BIT_PULSE_TIME + 0.5) +#define IRSND_BOSE_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BOSE_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_BOSE_PULSE_LEN (uint8_t)(F_INTERRUPTS * BOSE_PULSE_TIME + 0.5) +#define IRSND_BOSE_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BOSE_1_PAUSE_TIME + 0.5) +#define IRSND_BOSE_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BOSE_0_PAUSE_TIME + 0.5) +#define IRSND_BOSE_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BOSE_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t! +#define IRSND_BOSE_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BOSE_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5) +#define IRSND_NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5) +#define IRSND_NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5) +#define IRSND_NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5) +#define IRSND_NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5) +#define IRSND_NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t! +#define IRSND_NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_FAN_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FAN_START_BIT_PULSE_TIME + 0.5) +#define IRSND_FAN_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FAN_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_FAN_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * FAN_1_PULSE_TIME + 0.5) +#define IRSND_FAN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FAN_1_PAUSE_TIME + 0.5) +#define IRSND_FAN_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * FAN_0_PULSE_TIME + 0.5) +#define IRSND_FAN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FAN_0_PAUSE_TIME + 0.5) +#define IRSND_FAN_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FAN_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t! +#define IRSND_FAN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FAN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_SPEAKER_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PULSE_TIME + 0.5) +#define IRSND_SPEAKER_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_SPEAKER_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PULSE_TIME + 0.5) +#define IRSND_SPEAKER_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PAUSE_TIME + 0.5) +#define IRSND_SPEAKER_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PULSE_TIME + 0.5) +#define IRSND_SPEAKER_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PAUSE_TIME + 0.5) +#define IRSND_SPEAKER_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t! +#define IRSND_SPEAKER_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5) +#define IRSND_BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5) +#define IRSND_BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5) +#define IRSND_BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5) +#define IRSND_BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5) +#define IRSND_BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5) +#define IRSND_BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5) +#define IRSND_BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5) +#define IRSND_BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5) +#define IRSND_BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5) +#define IRSND_BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5) +#define IRSND_BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5) +#define IRSND_GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5) +#define IRSND_GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t! +#define IRSND_NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t! +#define IRSND_GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5) +#define IRSND_SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5) +#define IRSND_SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_RUWIDO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5) +#define IRSND_RUWIDO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_RUWIDO_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5) +#define IRSND_RUWIDO_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME + 0.5) +#define IRSND_RUWIDO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5) +#define IRSND_FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5) +#define IRSND_FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5) +#define IRSND_FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5) +#define IRSND_FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5) +#define IRSND_RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5) +#define IRSND_RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5) +#define IRSND_RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5) +#define IRSND_RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_JVC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME + 0.5) +#define IRSND_JVC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_JVC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_REPEAT_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_JVC_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME + 0.5) +#define IRSND_JVC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME + 0.5) +#define IRSND_JVC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME + 0.5) +#define IRSND_JVC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_NIKON_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME + 0.5) +#define IRSND_NIKON_START_BIT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_NIKON_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_NIKON_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME + 0.5) +#define IRSND_NIKON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME + 0.5) +#define IRSND_NIKON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME + 0.5) +#define IRSND_NIKON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_LEGO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME + 0.5) +#define IRSND_LEGO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_LEGO_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_REPEAT_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_LEGO_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME + 0.5) +#define IRSND_LEGO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME + 0.5) +#define IRSND_LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5) +#define IRSND_LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_IRMP16_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * IRMP16_START_BIT_PULSE_TIME + 0.5) +#define IRSND_IRMP16_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * IRMP16_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_IRMP16_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * IRMP16_REPEAT_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_IRMP16_PULSE_LEN (uint8_t)(F_INTERRUPTS * IRMP16_PULSE_TIME + 0.5) +#define IRSND_IRMP16_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * IRMP16_1_PAUSE_TIME + 0.5) +#define IRSND_IRMP16_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * IRMP16_0_PAUSE_TIME + 0.5) +#define IRSND_IRMP16_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IRMP16_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_A1TVBOX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME + 0.5) +#define IRSND_A1TVBOX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_A1TVBOX_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME + 0.5) +#define IRSND_A1TVBOX_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME + 0.5) +#define IRSND_A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! +#define IRSND_A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_ROOMBA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME + 0.5) +#define IRSND_ROOMBA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_ROOMBA_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME + 0.5) +#define IRSND_ROOMBA_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME + 0.5) +#define IRSND_ROOMBA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME + 0.5) +#define IRSND_ROOMBA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME + 0.5) +#define IRSND_ROOMBA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * ROOMBA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_PENTAX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_START_BIT_PULSE_TIME + 0.5) +#define IRSND_PENTAX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_PENTAX_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_REPEAT_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_PENTAX_PULSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_PULSE_TIME + 0.5) +#define IRSND_PENTAX_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_1_PAUSE_TIME + 0.5) +#define IRSND_PENTAX_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_0_PAUSE_TIME + 0.5) +#define IRSND_PENTAX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * PENTAX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define IRSND_ACP24_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_START_BIT_PULSE_TIME + 0.5) +#define IRSND_ACP24_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_ACP24_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_REPEAT_START_BIT_PAUSE_TIME + 0.5) +#define IRSND_ACP24_PULSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_PULSE_TIME + 0.5) +#define IRSND_ACP24_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_1_PAUSE_TIME + 0.5) +#define IRSND_ACP24_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_0_PAUSE_TIME + 0.5) +#define IRSND_ACP24_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * ACP24_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#ifdef PIC_C18 // PIC C18 +# define IRSND_FREQ_TYPE uint8_t +# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1) +# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1) +# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1) +# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1) +# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1) +# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1) +# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1) +#elif defined (ARM_STM32) // STM32 +# define IRSND_FREQ_TYPE uint32_t +# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000) +# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000) +# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000) +# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000) +# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000) +# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000) +# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000) +#elif defined (ARM_STM32_HAL) // STM32 with Hal Library +# define IRSND_FREQ_TYPE uint32_t +# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000) +# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000) +# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000) +# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000) +# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000) +# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000) +# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000) +#elif defined (TEENSY_ARM_CORTEX_M4) // TEENSY +# define IRSND_FREQ_TYPE float +# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000) +# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000) +# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000) +# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000) +# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000) +# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000) +# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000) +#elif defined (__xtensa__) // ESP8266 +# define IRSND_FREQ_TYPE float +# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000) +# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000) +# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000) +# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000) +# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000) +# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000) +# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000) +#else // AVR +# if F_CPU >= 16000000L +# define AVR_PRESCALER 8 +# else +# define AVR_PRESCALER 1 +# endif +# define IRSND_FREQ_TYPE uint8_t +# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / AVR_PRESCALER / 2) - 1) +# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / AVR_PRESCALER / 2) - 1) +# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / AVR_PRESCALER / 2) - 1) +# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / AVR_PRESCALER / 2) - 1) +# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / AVR_PRESCALER / 2) - 1) +# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / AVR_PRESCALER / 2) - 1) +# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / AVR_PRESCALER / 2) - 1) +#endif + +// Used for Arduino by IRTimer.cpp.h +volatile uint8_t irsnd_busy = 0; +volatile uint8_t irsnd_is_on = FALSE; + +static volatile uint8_t irsnd_protocol = 0; +static volatile uint8_t irsnd_buffer[11] = {0}; +static volatile uint8_t irsnd_repeat = 0; + +#if defined(ARDUINO) +#include "irsndArduinoExt.cpp.h" // must be after the declarations of irsnd_busy etc. +#else + +#if IRSND_USE_CALLBACK == 1 +static void (*irsnd_callback_ptr) (uint8_t); +#endif // IRSND_USE_CALLBACK == 1 + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * Switch PWM on + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +static void +irsnd_on (void) +{ + if (! irsnd_is_on) + { +#ifndef ANALYZE +# if defined(PIC_C18) // PIC C18 + PWMon(); + // IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off) + +# elif defined (ARM_STM32) // STM32 + TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_OCMode_PWM1); // enable PWM as OC-mode + TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM()) + TIM_Cmd(IRSND_TIMER, ENABLE); // enable counter + +# elif defined (ARM_STM32_HAL) // STM32 with Hal Library + HAL_TIM_PWM_Start(&IRSND_TIMER_HANDLER, IRSND_TIMER_CHANNEL_NUMBER); + +# elif defined (TEENSY_ARM_CORTEX_M4) // TEENSY + analogWrite(IRSND_PIN, 33 * 255 / 100); // pwm 33% + +# elif defined (__xtensa__) // ESP8266 (Arduino) + analogWrite(IRSND_PIN, 33 * 1023 / 100); // pwm 33% + +# elif defined (__AVR_XMEGA__) +# if (IRSND_OCx == IRSND_XMEGA_OC0A) // use OC0A + XMEGA_Timer.CTRLB |= (1< disbale PWM output pin (0=PWM on, 1=PWM off) + +# elif defined (ARM_STM32) // STM32 + TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter + TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive + TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM()) + TIM_SetCounter(IRSND_TIMER, 0); // reset counter value + +# elif defined (ARM_STM32_HAL) // STM32 + HAL_TIM_PWM_Stop(&IRSND_TIMER_HANDLER, IRSND_TIMER_CHANNEL_NUMBER); + +# elif defined (TEENSY_ARM_CORTEX_M4) // TEENSY + analogWrite(IRSND_PIN, 0); // pwm off, LOW level + +# elif defined (__xtensa__) // ESP8266 + analogWrite(IRSND_PIN, 0); // pwm off, LOW level + +# elif defined (__AVR_XMEGA__) +# if (IRSND_OCx == IRSND_XMEGA_OC0A) // use OC0A + XMEGA_Timer.CTRLB &= ~(1< +#endif + +static void +irsnd_set_freq (IRSND_FREQ_TYPE freq) +{ +#ifndef ANALYZE +# if defined(PIC_C18) // PIC C18 or XC8 +# if defined(__12F1840) // XC8 + TRISA2=0; + PR2=freq; + CCP1M0=1; + CCP1M1=1; + CCP1M2=1; + CCP1M3=1; + DC1B0=1; + DC1B1=0; + CCPR1L = 0b01101001; + TMR2IF = 0; + TMR2ON=1; + CCP1CON &=(~0b0011); // p 197 "active high" +# else // PIC C18 + OpenPWM(freq); + SetDCPWM( (uint16_t) (freq * 2) + 1); // freq*2 = Duty cycles 50% +# endif + PWMoff(); +# elif defined (ARM_STM32) // STM32 + static uint32_t TimeBaseFreq = 0; + + if (TimeBaseFreq == 0) + { + RCC_ClocksTypeDef RCC_ClocksStructure; + /* Get system clocks and store timer clock in variable */ + RCC_GetClocksFreq(&RCC_ClocksStructure); +# if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14)) + if (RCC_ClocksStructure.PCLK1_Frequency == RCC_ClocksStructure.HCLK_Frequency) + { + TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency; + } + else + { + TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency * 2; + } +# else + if (RCC_ClocksStructure.PCLK2_Frequency == RCC_ClocksStructure.HCLK_Frequency) + { + TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency; + } + else + { + TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency * 2; + } +# endif + } + + freq = TimeBaseFreq/freq; + + /* Set frequency */ + TIM_SetAutoreload(IRSND_TIMER, freq - 1); + /* Set duty cycle */ + TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2); + +# elif defined (ARM_STM32_HAL) // STM32 with Hal Library + + TIM_MasterConfigTypeDef sMasterConfig; + TIM_OC_InitTypeDef sConfigOC; + + uint32_t uwPrescalerValue = (uint32_t) ((IRSND_TIMER_SPEED_APBX) / (freq*10)) - 1; //1kHz + + //IRSND_TIMER_HANDLER.Instance = TIM2; + IRSND_TIMER_HANDLER.Init.Prescaler = uwPrescalerValue; + IRSND_TIMER_HANDLER.Init.CounterMode = TIM_COUNTERMODE_UP; + IRSND_TIMER_HANDLER.Init.Period = 10 -1; + IRSND_TIMER_HANDLER.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + IRSND_TIMER_HANDLER.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + + if (HAL_TIM_PWM_Init(&IRSND_TIMER_HANDLER) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + + if (HAL_TIMEx_MasterConfigSynchronization(&IRSND_TIMER_HANDLER, &sMasterConfig) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + + sConfigOC.OCMode = TIM_OCMODE_PWM1; + sConfigOC.Pulse = IRSND_TIMER_HANDLER.Init.Period / 2; + sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + + if (HAL_TIM_PWM_ConfigChannel(&IRSND_TIMER_HANDLER, &sConfigOC, IRSND_TIMER_CHANNEL_NUMBER ) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + +# elif defined (TEENSY_ARM_CORTEX_M4) + analogWriteResolution(8); // 8 bit + analogWriteFrequency(IRSND_PIN, freq); + analogWrite(IRSND_PIN, 0); // pwm off, LOW level + +#elif defined (__xtensa__) + // analogWriteRange(255); + analogWriteFreq(freq); + analogWrite(IRSND_PIN, 0); // pwm off, LOW level + +# elif defined (__AVR_XMEGA__) + XMEGA_Timer.CCA = freq; + +# else // AVR + +# if IRSND_OCx == IRSND_OC2 + OCR2 = freq; // use register OCR2 for OC2 +# elif IRSND_OCx == IRSND_OC2A // use OC2A + OCR2A = freq; // use register OCR2A for OC2A and OC2B! +# elif IRSND_OCx == IRSND_OC2B // use OC2B + OCR2A = freq; // use register OCR2A for OC2A and OC2B! +# elif IRSND_OCx == IRSND_OC0 // use OC0 + OCR0 = freq; // use register OCR2 for OC2 +# elif IRSND_OCx == IRSND_OC0A // use OC0A + OCR0A = freq; // use register OCR0A for OC0A and OC0B! +# elif IRSND_OCx == IRSND_OC0B // use OC0B + OCR0A = freq; // use register OCR0A for OC0A and OC0B! +# else +# error wrong value of IRSND_OCx +# endif +# endif //PIC_C18 +#endif // ANALYZE +} + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * Initialize the PWM + * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +void +irsnd_init (void) +{ +#ifndef ANALYZE +# if defined(PIC_C18) // PIC C18 or XC8 compiler +# if ! defined(__12F1840) // only C18: + OpenTimer; +# endif + irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency + IRSND_PIN = 0; // set IO to outout + PWMoff(); +# elif defined (ARM_STM32) // STM32 + GPIO_InitTypeDef GPIO_InitStructure; + TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; + TIM_OCInitTypeDef TIM_OCInitStructure; + + /* GPIOx clock enable */ +# if defined (ARM_STM32L1XX) + RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE); +# elif defined (ARM_STM32F10X) + RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE); + // RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); // only in case of remapping, not necessary for default port-timer mapping +# elif defined (ARM_STM32F30X) + RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE); +# elif defined (ARM_STM32F4XX) + RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE); +# endif + + /* GPIO Configuration */ + GPIO_InitStructure.GPIO_Pin = IRSND_BIT; +# if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX) + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_Init(IRSND_PORT, &GPIO_InitStructure); + GPIO_PinAFConfig(IRSND_PORT, (uint8_t)IRSND_BIT_NUMBER, IRSND_GPIO_AF); +# elif defined (ARM_STM32F10X) + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_Init(IRSND_PORT, &GPIO_InitStructure); + // GPIO_PinRemapConfig(GPIO_*Remap*_TIM[IRSND_TIMER_NUMBER], ENABLE); // only in case of remapping, not necessary for default port-timer mapping +# elif defined (ARM_STM32F30X) + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_Init(IRSND_PORT, &GPIO_InitStructure); + // GPIO_PinRemapConfig(GPIO_*Remap*_TIM[IRSND_TIMER_NUMBER], ENABLE); // only in case of remapping, not necessary for default port-timer mapping + +# endif + + /* TIMx clock enable */ +# if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14)) + RCC_APB1PeriphClockCmd(IRSND_TIMER_RCC, ENABLE); +# else + RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE); +# endif + + /* Time base configuration */ + TIM_TimeBaseStructure.TIM_Period = -1; // set dummy value (don't set to 0), will be initialized later + TIM_TimeBaseStructure.TIM_Prescaler = 0; + TIM_TimeBaseStructure.TIM_ClockDivision = 0; + TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; + TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure); + + /* PWM1 Mode configuration */ + TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1; + TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; + TIM_OCInitStructure.TIM_Pulse = 0; // will be initialized later + TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; + TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure); + + /* Preload configuration */ + TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE); + TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable); + + irsnd_set_freq (IRSND_FREQ_36_KHZ); // set default frequency + +# elif defined (ARM_STM32_HAL) + irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency + +# elif defined (TEENSY_ARM_CORTEX_M4) + if (!digitalPinHasPWM(IRSND_PIN)) + { + return; + } + +# elif defined (__xtensa__) + pinMode(IRSND_PIN, OUTPUT); + irsnd_set_freq (IRSND_FREQ_36_KHZ); + +# elif defined (__AVR_XMEGA__) + IRSND_PORT &= ~(1<>= 1; + len--; + } + return xx; +} + + +#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 +static uint8_t sircs_additional_bitlen; +#endif // IRSND_SUPPORT_SIRCS_PROTOCOL == 1 + +/* + * @param do_wait - wait for last command to have ended before sending. For Arduino: Additionally wait for sent command to have ended. + */ +# ifdef __cplusplus +bool +#else +uint8_t +#endif +irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait) +{ +#if IRSND_SUPPORT_RECS80_PROTOCOL == 1 + static uint8_t toggle_bit_recs80; +#endif +#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 + static uint8_t toggle_bit_recs80ext; +#endif +#if IRSND_SUPPORT_RC5_PROTOCOL == 1 + static uint8_t toggle_bit_rc5; +#endif +#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1 + static uint8_t toggle_bit_rc6; +#endif +#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1 + static uint8_t toggle_bit_thomson; +#endif + uint16_t address; + uint16_t command; + + if (do_wait) + { + while (irsnd_busy) + { + // wait for last command to have ended + } + } + else if (irsnd_busy) + { + return (FALSE); + } + + irsnd_protocol = irmp_data_p->protocol; + irsnd_repeat = irmp_data_p->flags & IRSND_REPETITION_MASK; + + switch (irsnd_protocol) + { +#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 + case IRMP_SIRCS_PROTOCOL: + { + // uint8_t sircs_additional_command_len; + uint8_t sircs_additional_address_len; + + sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen + + if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN) + { + // sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN; + sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN); + } + else + { + // sircs_additional_command_len = sircs_additional_bitlen; + sircs_additional_address_len = 0; + } + + command = bitsrevervse (irmp_data_p->command, 15); + + irsnd_buffer[0] = (command & 0x7F80) >> 7; // CCCCCCCC + irsnd_buffer[1] = (command & 0x007F) << 1; // CCCC**** + + if (sircs_additional_address_len > 0) + { + address = bitsrevervse (irmp_data_p->address, 5); + irsnd_buffer[1] |= (address & 0x0010) >> 4; + irsnd_buffer[2] = (address & 0x000F) << 4; + } + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_NEC_PROTOCOL == 1 + case IRMP_APPLE_PROTOCOL: + { + command = irmp_data_p->command | (irmp_data_p->address << 8); // store address as ID in upper byte of command + address = 0x87EE; // set fixed NEC-lookalike address (customer ID of apple) + + address = bitsrevervse (address, NEC_ADDRESS_LEN); + command = bitsrevervse (command, NEC_COMMAND_LEN); + + irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with id instead of inverted command + + irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA + irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA + irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC + irsnd_buffer[3] = (command & 0x00FF); // cccccccc (ID) + irsnd_busy = TRUE; + break; + } + case IRMP_NEC_PROTOCOL: + { + if (irmp_data_p->flags & IRSND_RAW_REPETITION_FRAME) + { + irsnd_protocol = IRMP_NEC_REPETITION_PROTOCOL; // send a raw repetition frame + irsnd_buffer[0] = 0x00; // no address, no command + } + else + { + address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN); + command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN); + + irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA + irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA + irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC + irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc + } + irsnd_busy = TRUE; + break; + } + case IRMP_ONKYO_PROTOCOL: + { + address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN); + command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN); + + irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA + irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA + irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC + irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_NEC16_PROTOCOL == 1 + case IRMP_NEC16_PROTOCOL: + { + address = bitsrevervse (irmp_data_p->address, NEC16_ADDRESS_LEN); + command = bitsrevervse (irmp_data_p->command, NEC16_COMMAND_LEN); + + irsnd_buffer[0] = (address & 0x00FF); // AAAAAAAA + irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_NEC42_PROTOCOL == 1 + case IRMP_NEC42_PROTOCOL: + { + address = bitsrevervse (irmp_data_p->address, NEC42_ADDRESS_LEN); + command = bitsrevervse (irmp_data_p->command, NEC42_COMMAND_LEN); + + irsnd_buffer[0] = ( (address & 0x1FE0) >> 5); // AAAAAAAA + irsnd_buffer[1] = ( (address & 0x001F) << 3) | ((~address & 0x1C00) >> 10); // AAAAAaaa + irsnd_buffer[2] = ((~address & 0x03FC) >> 2); // aaaaaaaa + irsnd_buffer[3] = ((~address & 0x0003) << 6) | ( (command & 0x00FC) >> 2); // aaCCCCCC + irsnd_buffer[4] = ( (command & 0x0003) << 6) | ((~command & 0x00FC) >> 2); // CCcccccc + irsnd_buffer[5] = ((~command & 0x0003) << 6); // cc + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_MELINERA_PROTOCOL == 1 + case IRMP_MELINERA_PROTOCOL: + { + command = irmp_data_p->command; + + irsnd_buffer[0] = (command & 0x00FF); // CCCCCCCC + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_LGAIR_PROTOCOL == 1 + case IRMP_LGAIR_PROTOCOL: + { + address = irmp_data_p->address; + command = irmp_data_p->command; + + irsnd_buffer[0] = ( (address & 0x00FF)); // AAAAAAAA + irsnd_buffer[1] = ( (command & 0xFF00) >> 8); // CCCCCCCC + irsnd_buffer[2] = ( (command & 0x00FF)); // CCCCCCCC + irsnd_buffer[3] = (( ((command & 0xF000) >> 12) + // checksum + ((command & 0x0F00) >> 8) + + ((command & 0x00F0) >>4 ) + + ((command & 0x000F))) & 0x000F) << 4; + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 + case IRMP_SAMSUNG_PROTOCOL: + { + address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN); + command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN); + + irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA + irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA + irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC + irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc + irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000 + irsnd_busy = TRUE; + break; + } + case IRMP_SAMSUNG32_PROTOCOL: + { + address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN); + command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN); + + irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA + irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA + irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC + irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1 + case IRMP_SAMSUNG48_PROTOCOL: + { + address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN); + command = bitsrevervse (irmp_data_p->command, 16); + + irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA + irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA + irsnd_buffer[2] = ((command & 0xFF00) >> 8); // CCCCCCCC + irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc + irsnd_buffer[4] = (command & 0x00FF); // CCCCCCCC + irsnd_buffer[5] = ~(command & 0x00FF); // cccccccc + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 + case IRMP_MATSUSHITA_PROTOCOL: + { + address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN); + command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN); + + irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC + irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA + irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_TECHNICS_PROTOCOL == 1 + case IRMP_TECHNICS_PROTOCOL: + { + command = bitsrevervse (irmp_data_p->command, TECHNICS_COMMAND_LEN); + + irsnd_buffer[0] = (command & 0x07FC) >> 3; // CCCCCCCC + irsnd_buffer[1] = ((command & 0x0007) << 5) | ((~command & 0x07C0) >> 6); // CCCccccc + irsnd_buffer[2] = (~command & 0x003F) << 2; // cccccc + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 + case IRMP_KASEIKYO_PROTOCOL: + { + uint8_t xor_value; + uint16_t genre2; + + address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN); + command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4); + genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4); + + xor_value = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F; + + irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA + irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA + irsnd_buffer[2] = xor_value << 4 | (command & 0x000F); // XXXXCCCC + irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC + irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC + + xor_value = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4]; + + irsnd_buffer[5] = xor_value; + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_PANASONIC_PROTOCOL == 1 + case IRMP_PANASONIC_PROTOCOL: + { + address = bitsrevervse (irmp_data_p->address, PANASONIC_ADDRESS_LEN); + command = bitsrevervse (irmp_data_p->command, PANASONIC_COMMAND_LEN); + + irsnd_buffer[0] = 0x40; // 01000000 + irsnd_buffer[1] = 0x04; // 00000100 + irsnd_buffer[2] = 0x01; // 00000001 + irsnd_buffer[3] = (address & 0xFF00) >> 8; // AAAAAAAA + irsnd_buffer[4] = (address & 0x00FF); // AAAAAAAA + irsnd_buffer[5] = (command & 0xFF00) >> 8; // CCCCCCCC + irsnd_buffer[6] = (command & 0x00FF); // CCCCCCCC + + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_MITSU_HEAVY_PROTOCOL == 1 + case IRMP_MITSU_HEAVY_PROTOCOL: + { + address = irmp_data_p->address; + command = irmp_data_p->command; + + irsnd_buffer[0] = 0x4A; + irsnd_buffer[1] = 0x75; + irsnd_buffer[2] = 0xC3; + irsnd_buffer[3] = 0x64; + irsnd_buffer[4] = 0x9B; + irsnd_buffer[5] = ~(address & 0xFF00) >> 8; + irsnd_buffer[6] = (address & 0xFF00) >> 8; + irsnd_buffer[7] = ~(address & 0x00FF); + irsnd_buffer[8] = (address & 0x00FF); + irsnd_buffer[9] = ~(command & 0x00FF); + irsnd_buffer[10] = (command & 0x00FF); + + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_RECS80_PROTOCOL == 1 + case IRMP_RECS80_PROTOCOL: + { + toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x80; + + irsnd_buffer[0] = toggle_bit_recs80 | ((irmp_data_p->address & 0x000F) << 4) | + ((irmp_data_p->command & 0x003C) >> 2); // TAAACCCC + irsnd_buffer[1] = (irmp_data_p->command & 0x03) << 6; // CC000000 + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 + case IRMP_RECS80EXT_PROTOCOL: + { + toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40; + + irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) | + ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC + irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000 + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_RC5_PROTOCOL == 1 + case IRMP_RC5_PROTOCOL: + { + toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40; + + irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 | + ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC + irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000 + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_RC6_PROTOCOL == 1 + case IRMP_RC6_PROTOCOL: + { + toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08; + + irsnd_buffer[0] = 0x80 | toggle_bit_rc6 | ((irmp_data_p->address & 0x00E0) >> 5); // 1MMMTAAA, MMM = 000 + irsnd_buffer[1] = ((irmp_data_p->address & 0x001F) << 3) | ((irmp_data_p->command & 0xE0) >> 5); // AAAAACCC + irsnd_buffer[2] = (irmp_data_p->command & 0x1F) << 3; // CCCCC + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_RC6A_PROTOCOL == 1 + case IRMP_RC6A_PROTOCOL: + { + toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08; + + irsnd_buffer[0] = 0x80 | 0x60 | ((irmp_data_p->address & 0x3000) >> 12); // 1MMMT0AA, MMM = 110 + irsnd_buffer[1] = ((irmp_data_p->address & 0x0FFF) >> 4) ; // AAAAAAAA + irsnd_buffer[2] = ((irmp_data_p->address & 0x000F) << 4) | ((irmp_data_p->command & 0xF000) >> 12) | toggle_bit_rc6; // AAAACCCC + irsnd_buffer[3] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC + irsnd_buffer[4] = (irmp_data_p->command & 0x000F) << 4; // CCCC + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_DENON_PROTOCOL == 1 + case IRMP_DENON_PROTOCOL: + { + irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame) + irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC + irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAAccc (2nd frame) + irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // ccccccc + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1 + case IRMP_THOMSON_PROTOCOL: + { + toggle_bit_thomson = toggle_bit_thomson ? 0x00 : 0x08; + + irsnd_buffer[0] = ((irmp_data_p->address & 0x0F) << 4) | toggle_bit_thomson | ((irmp_data_p->command & 0x0070) >> 4); // AAAATCCC (1st frame) + irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_BOSE_PROTOCOL == 1 + case IRMP_BOSE_PROTOCOL: + { + command = bitsrevervse (irmp_data_p->command, BOSE_COMMAND_LEN); + + irsnd_buffer[0] = (command & 0xFF00) >> 8; // CCCCCCCC + irsnd_buffer[1] = ~((command & 0xFF00) >> 8); // cccccccc + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1 + case IRMP_NUBERT_PROTOCOL: + { + irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC + irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000 + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_FAN_PROTOCOL == 1 + case IRMP_FAN_PROTOCOL: + { + irsnd_buffer[0] = irmp_data_p->command >> 3; // CCCCCCCC + irsnd_buffer[1] = (irmp_data_p->command & 0x0007) << 5; // CCC00000 + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1 + case IRMP_SPEAKER_PROTOCOL: + { + irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC + irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000 + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 + case IRMP_BANG_OLUFSEN_PROTOCOL: + { + irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC + irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC + irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000 + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 + case IRMP_GRUNDIG_PROTOCOL: + { + command = bitsrevervse (irmp_data_p->command, GRUNDIG_COMMAND_LEN); + + irsnd_buffer[0] = 0xFF; // S1111111 (1st frame) + irsnd_buffer[1] = 0xC0; // 11 + irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame) + irsnd_buffer[3] = (command << 6) & 0xC0; // CC + + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1 + case IRMP_TELEFUNKEN_PROTOCOL: + { + irsnd_buffer[0] = irmp_data_p->command >> 7; // CCCCCCCC + irsnd_buffer[1] = (irmp_data_p->command << 1) & 0xff; // CCCCCCC + + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_IR60_PROTOCOL == 1 + case IRMP_IR60_PROTOCOL: + { + command = (bitsrevervse (0x7d, IR60_COMMAND_LEN) << 7) | bitsrevervse (irmp_data_p->command, IR60_COMMAND_LEN); +#if 0 + irsnd_buffer[0] = command >> 6 | 0x01; // 1011111S (start instruction frame) + irsnd_buffer[1] = (command & 0x7F) << 1; // CCCCCCC_ (2nd frame) +#else + irsnd_buffer[0] = ((command & 0x7F) << 1) | 0x01; // CCCCCCCS (1st frame) + irsnd_buffer[1] = command >> 6; // 1011111_ (start instruction frame) +#endif + + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1 + case IRMP_NOKIA_PROTOCOL: + { + address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN); + command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN); + + irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame) + irsnd_buffer[1] = 0xFF; // 11111111 + irsnd_buffer[2] = 0x80; // 1 + irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame) + irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA + irsnd_buffer[5] = (address << 7); // A + + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 + case IRMP_SIEMENS_PROTOCOL: + { + irsnd_buffer[0] = ((irmp_data_p->address & 0x07FF) >> 3); // AAAAAAAA + irsnd_buffer[1] = ((irmp_data_p->address & 0x0007) << 5) | ((irmp_data_p->command >> 5) & 0x1F); // AAACCCCC + irsnd_buffer[2] = ((irmp_data_p->command & 0x001F) << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc + + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 + case IRMP_RUWIDO_PROTOCOL: + { + irsnd_buffer[0] = ((irmp_data_p->address & 0x01FF) >> 1); // AAAAAAAA + irsnd_buffer[1] = ((irmp_data_p->address & 0x0001) << 7) | ((irmp_data_p->command & 0x7F)); // ACCCCCCC + irsnd_buffer[2] = ((~irmp_data_p->command & 0x01) << 7); // c + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_FDC_PROTOCOL == 1 + case IRMP_FDC_PROTOCOL: + { + address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN); + command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN); + + irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA + irsnd_buffer[1] = 0; // 00000000 + irsnd_buffer[2] = 0; // 0000RRRR + irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC + irsnd_buffer[4] = ~(command & 0xFF); // cccccccc + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1 + case IRMP_RCCAR_PROTOCOL: + { + address = bitsrevervse (irmp_data_p->address, 2); // A0 A1 + command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V + + irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3 + irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0 + + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_JVC_PROTOCOL == 1 + case IRMP_JVC_PROTOCOL: + { + address = bitsrevervse (irmp_data_p->address, JVC_ADDRESS_LEN); + command = bitsrevervse (irmp_data_p->command, JVC_COMMAND_LEN); + + irsnd_buffer[0] = ((address & 0x000F) << 4) | (command & 0x0F00) >> 8; // AAAACCCC + irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC + + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_NIKON_PROTOCOL == 1 + case IRMP_NIKON_PROTOCOL: + { + irsnd_buffer[0] = (irmp_data_p->command & 0x0003) << 6; // CC + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_LEGO_PROTOCOL == 1 + case IRMP_LEGO_PROTOCOL: + { + uint8_t crc = 0x0F ^ ((irmp_data_p->command & 0x0F00) >> 8) ^ ((irmp_data_p->command & 0x00F0) >> 4) ^ (irmp_data_p->command & 0x000F); + + irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC + irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_IRMP16_PROTOCOL == 1 + case IRMP_IRMP16_PROTOCOL: + { + command = bitsrevervse (irmp_data_p->command, IRMP16_COMMAND_LEN); + + irsnd_buffer[0] = (command & 0xFF00) >> 8; // CCCCCCCC + irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1 + case IRMP_A1TVBOX_PROTOCOL: + { + irsnd_buffer[0] = 0x80 | (irmp_data_p->address >> 2); // 10AAAAAA + irsnd_buffer[1] = (irmp_data_p->address << 6) | (irmp_data_p->command >> 2); // AACCCCCC + irsnd_buffer[2] = (irmp_data_p->command << 6); // CC + + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1 + case IRMP_ROOMBA_PROTOCOL: + { + irsnd_buffer[0] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC. + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_PENTAX_PROTOCOL == 1 + case IRMP_PENTAX_PROTOCOL: + { + irsnd_buffer[0] = (irmp_data_p->command & 0x3F) << 2; // CCCCCC.. + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_ACP24_PROTOCOL == 1 +# define ACP_SET_BIT(acp24_bitno, c, irmp_bitno) \ + do \ + { \ + if ((c) & (1<<(irmp_bitno))) \ + { \ + irsnd_buffer[((acp24_bitno)>>3)] |= 1 << (((7 - (acp24_bitno)) & 0x07)); \ + } \ + } while (0) + + case IRMP_ACP24_PROTOCOL: + { + uint16_t cmd = irmp_data_p->command; + uint8_t i; + + address = bitsrevervse (irmp_data_p->address, ACP24_ADDRESS_LEN); + + for (i = 0; i < 8; i++) + { + irsnd_buffer[i] = 0x00; // CCCCCCCC + } + + // ACP24-Frame: + // 1 2 3 4 5 6 + // 0123456789012345678901234567890123456789012345678901234567890123456789 + // N VVMMM ? ??? t vmA x y TTTT + // + // irmp_data_p->command: + // + // 5432109876543210 + // NAVVvMMMmtxyTTTT + + ACP_SET_BIT( 0, cmd, 15); + ACP_SET_BIT(24, cmd, 14); + ACP_SET_BIT( 2, cmd, 13); + ACP_SET_BIT( 3, cmd, 12); + ACP_SET_BIT(22, cmd, 11); + ACP_SET_BIT( 4, cmd, 10); + ACP_SET_BIT( 5, cmd, 9); + ACP_SET_BIT( 6, cmd, 8); + ACP_SET_BIT(23, cmd, 7); + ACP_SET_BIT(20, cmd, 6); + ACP_SET_BIT(26, cmd, 5); + ACP_SET_BIT(44, cmd, 4); + ACP_SET_BIT(66, cmd, 3); + ACP_SET_BIT(67, cmd, 2); + ACP_SET_BIT(68, cmd, 1); + ACP_SET_BIT(69, cmd, 0); + + irsnd_busy = TRUE; + break; + } +#endif + + default: + { + break; + } + } + +#if defined(ARDUINO) + storeIRTimer(); // store current timer state to enable alternately send and receive with the same timer + initIRTimerForSend(); // Setup timer and interrupts for sending + if (do_wait) { + while (irsnd_busy) { + // do nothing; + } + } +#endif + + return irsnd_busy; +} + +void +irsnd_stop (void) +{ + irsnd_repeat = 0; +} + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * ISR routine + * @details ISR routine, called from 10000 to 20000, typically 15000 times per second + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +# ifdef __cplusplus +bool +#else +uint8_t +#endif +irsnd_ISR (void) +{ + static uint8_t send_trailer = FALSE; + static uint8_t current_bit = 0xFF; + static uint8_t pulse_counter = 0; + static IRSND_PAUSE_LEN pause_counter = 0; + static uint8_t startbit_pulse_len = 0; + static IRSND_PAUSE_LEN startbit_pause_len = 0; + static uint8_t pulse_1_len = 0; + static uint8_t pause_1_len = 0; + static uint8_t pulse_0_len = 0; + static uint8_t pause_0_len = 0; + static uint8_t has_stop_bit = 0; + static uint8_t new_frame = TRUE; + static uint8_t complete_data_len = 0; + static uint8_t n_repeat_frames = 0; // number of repetition frames + static uint8_t n_auto_repetitions = 0; // number of auto_repetitions + static uint8_t auto_repetition_counter = 0; // auto_repetition counter + static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t! + static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t! + static uint8_t repeat_counter = 0; // repeat counter + static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t! + static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t! +#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 + static uint8_t last_bit_value; +#endif + static uint8_t pulse_len = 0xFF; + static IRSND_PAUSE_LEN pause_len = 0xFF; + + if (irsnd_busy) + { + if (current_bit == 0xFF && new_frame) // start of transmission... + { + if (auto_repetition_counter > 0) + { + auto_repetition_pause_counter++; + + if (auto_repetition_pause_counter >= auto_repetition_pause_len) + { + auto_repetition_pause_counter = 0; + +#if IRSND_SUPPORT_DENON_PROTOCOL == 1 + if (irsnd_protocol == IRMP_DENON_PROTOCOL) // n'th denon frame + { + current_bit = 16; + complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1; + } + else +#endif +#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 + if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame + { + current_bit = 15; + complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN; + } + else +#endif +#if IRSND_SUPPORT_IR60_PROTOCOL == 1 + if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame + { + current_bit = 7; + complete_data_len = 2 * IR60_COMPLETE_DATA_LEN + 1; + } + else +#endif +#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1 + if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame + { + if (auto_repetition_counter + 1 < n_auto_repetitions) + { + current_bit = 23; + complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN; + } + else // nokia stop frame + { + current_bit = 0xFF; + complete_data_len = NOKIA_COMPLETE_DATA_LEN; + } + } + else +#endif + { + ; + } + } + else + { +#ifdef ANALYZE + if (irsnd_is_on) + { + putchar ('0'); + } + else + { + putchar ('1'); + } +#endif + return irsnd_busy; + } + } + else if (packet_repeat_pause_counter < repeat_frame_pause_len) + { + packet_repeat_pause_counter++; +#ifdef ANALYZE + if (irsnd_is_on) + { + putchar ('0'); + } + else + { + putchar ('1'); + } +#endif + return irsnd_busy; + } + else + { + if (send_trailer) + { + irsnd_busy = FALSE; + send_trailer = FALSE; + return irsnd_busy; + } + + n_repeat_frames = irsnd_repeat; + + if (n_repeat_frames == IRSND_ENDLESS_REPETITION) + { + n_repeat_frames = 255; + } + + packet_repeat_pause_counter = 0; + pulse_counter = 0; + pause_counter = 0; + + switch (irsnd_protocol) + { +#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 + case IRMP_SIRCS_PROTOCOL: + { + startbit_pulse_len = IRSND_SIRCS_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_SIRCS_START_BIT_PAUSE_LEN - 1; + pulse_1_len = IRSND_SIRCS_1_PULSE_LEN; + pause_1_len = IRSND_SIRCS_PAUSE_LEN - 1; + pulse_0_len = IRSND_SIRCS_0_PULSE_LEN; + pause_0_len = IRSND_SIRCS_PAUSE_LEN - 1; + has_stop_bit = SIRCS_STOP_BIT; + complete_data_len = SIRCS_MINIMUM_DATA_LEN + sircs_additional_bitlen; + n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame + auto_repetition_pause_len = IRSND_SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause + repeat_frame_pause_len = IRSND_SIRCS_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_40_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_NEC_PROTOCOL == 1 + case IRMP_NEC_PROTOCOL: + case IRMP_NEC_REPETITION_PROTOCOL: + case IRMP_ONKYO_PROTOCOL: + { + startbit_pulse_len = IRSND_NEC_START_BIT_PULSE_LEN; + + if (repeat_counter > 0 || irsnd_protocol == IRMP_NEC_REPETITION_PROTOCOL) + { + startbit_pause_len = IRSND_NEC_REPEAT_START_BIT_PAUSE_LEN - 1; + complete_data_len = 0; + } + else + { + startbit_pause_len = IRSND_NEC_START_BIT_PAUSE_LEN - 1; + complete_data_len = NEC_COMPLETE_DATA_LEN; + } + + pulse_1_len = IRSND_NEC_PULSE_LEN; + pause_1_len = IRSND_NEC_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_NEC_PULSE_LEN; + pause_0_len = IRSND_NEC_0_PAUSE_LEN - 1; + has_stop_bit = NEC_STOP_BIT; + n_auto_repetitions = 1; // 1 frame + auto_repetition_pause_len = 0; + repeat_frame_pause_len = IRSND_NEC_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_NEC16_PROTOCOL == 1 + case IRMP_NEC16_PROTOCOL: + { + startbit_pulse_len = IRSND_NEC_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_NEC_START_BIT_PAUSE_LEN - 1; + pulse_1_len = IRSND_NEC_PULSE_LEN; + pause_1_len = IRSND_NEC_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_NEC_PULSE_LEN; + pause_0_len = IRSND_NEC_0_PAUSE_LEN - 1; + has_stop_bit = NEC_STOP_BIT; + complete_data_len = NEC16_COMPLETE_DATA_LEN + 1; // 1 more: sync bit + n_auto_repetitions = 1; // 1 frame + auto_repetition_pause_len = 0; + repeat_frame_pause_len = IRSND_NEC_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_NEC42_PROTOCOL == 1 + case IRMP_NEC42_PROTOCOL: + { + startbit_pulse_len = IRSND_NEC_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_NEC_START_BIT_PAUSE_LEN - 1; + pulse_1_len = IRSND_NEC_PULSE_LEN; + pause_1_len = IRSND_NEC_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_NEC_PULSE_LEN; + pause_0_len = IRSND_NEC_0_PAUSE_LEN - 1; + has_stop_bit = NEC_STOP_BIT; + complete_data_len = NEC42_COMPLETE_DATA_LEN; + n_auto_repetitions = 1; // 1 frame + auto_repetition_pause_len = 0; + repeat_frame_pause_len = IRSND_NEC_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_MELINERA_PROTOCOL == 1 + case IRMP_MELINERA_PROTOCOL: + { + startbit_pulse_len = IRSND_MELINERA_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_MELINERA_START_BIT_PAUSE_LEN - 1; + pulse_1_len = IRSND_MELINERA_1_PULSE_LEN; + pause_1_len = IRSND_MELINERA_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_MELINERA_0_PULSE_LEN; + pause_0_len = IRSND_MELINERA_0_PAUSE_LEN - 1; + has_stop_bit = MELINERA_STOP_BIT; + complete_data_len = MELINERA_COMPLETE_DATA_LEN; + n_auto_repetitions = 1; // 1 frame + auto_repetition_pause_len = 0; + repeat_frame_pause_len = IRSND_MELINERA_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_LGAIR_PROTOCOL == 1 + case IRMP_LGAIR_PROTOCOL: + { + startbit_pulse_len = IRSND_NEC_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_NEC_START_BIT_PAUSE_LEN - 1; + pulse_1_len = IRSND_NEC_PULSE_LEN; + pause_1_len = IRSND_NEC_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_NEC_PULSE_LEN; + pause_0_len = IRSND_NEC_0_PAUSE_LEN - 1; + has_stop_bit = NEC_STOP_BIT; + complete_data_len = LGAIR_COMPLETE_DATA_LEN; + n_auto_repetitions = 1; // 1 frame + auto_repetition_pause_len = 0; + repeat_frame_pause_len = IRSND_NEC_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 + case IRMP_SAMSUNG_PROTOCOL: + { + startbit_pulse_len = IRSND_SAMSUNG_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_SAMSUNG_START_BIT_PAUSE_LEN - 1; + pulse_1_len = IRSND_SAMSUNG_PULSE_LEN; + pause_1_len = IRSND_SAMSUNG_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_SAMSUNG_PULSE_LEN; + pause_0_len = IRSND_SAMSUNG_0_PAUSE_LEN - 1; + has_stop_bit = SAMSUNG_STOP_BIT; + complete_data_len = SAMSUNG_COMPLETE_DATA_LEN; + n_auto_repetitions = 1; // 1 frame + auto_repetition_pause_len = 0; + repeat_frame_pause_len = IRSND_SAMSUNG_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } + + case IRMP_SAMSUNG32_PROTOCOL: + { + startbit_pulse_len = IRSND_SAMSUNG_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_SAMSUNG_START_BIT_PAUSE_LEN - 1; + pulse_1_len = IRSND_SAMSUNG_PULSE_LEN; + pause_1_len = IRSND_SAMSUNG_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_SAMSUNG_PULSE_LEN; + pause_0_len = IRSND_SAMSUNG_0_PAUSE_LEN - 1; + has_stop_bit = SAMSUNG_STOP_BIT; + complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN; + n_auto_repetitions = SAMSUNG32_FRAMES; // 1 frame + auto_repetition_pause_len = IRSND_SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause + repeat_frame_pause_len = IRSND_SAMSUNG32_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1 + case IRMP_SAMSUNG48_PROTOCOL: + { + startbit_pulse_len = IRSND_SAMSUNG_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_SAMSUNG_START_BIT_PAUSE_LEN - 1; + pulse_1_len = IRSND_SAMSUNG_PULSE_LEN; + pause_1_len = IRSND_SAMSUNG_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_SAMSUNG_PULSE_LEN; + pause_0_len = IRSND_SAMSUNG_0_PAUSE_LEN - 1; + has_stop_bit = SAMSUNG_STOP_BIT; + complete_data_len = SAMSUNG48_COMPLETE_DATA_LEN; + n_auto_repetitions = SAMSUNG48_FRAMES; // 1 frame + auto_repetition_pause_len = IRSND_SAMSUNG48_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause + repeat_frame_pause_len = IRSND_SAMSUNG48_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 + case IRMP_MATSUSHITA_PROTOCOL: + { + startbit_pulse_len = IRSND_MATSUSHITA_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_MATSUSHITA_START_BIT_PAUSE_LEN - 1; + pulse_1_len = IRSND_MATSUSHITA_PULSE_LEN; + pause_1_len = IRSND_MATSUSHITA_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_MATSUSHITA_PULSE_LEN; + pause_0_len = IRSND_MATSUSHITA_0_PAUSE_LEN - 1; + has_stop_bit = MATSUSHITA_STOP_BIT; + complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN; + n_auto_repetitions = 1; // 1 frame + auto_repetition_pause_len = 0; + repeat_frame_pause_len = IRSND_MATSUSHITA_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_36_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_TECHNICS_PROTOCOL == 1 + case IRMP_TECHNICS_PROTOCOL: + { + startbit_pulse_len = IRSND_MATSUSHITA_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_MATSUSHITA_START_BIT_PAUSE_LEN - 1; + pulse_1_len = IRSND_MATSUSHITA_PULSE_LEN; + pause_1_len = IRSND_MATSUSHITA_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_MATSUSHITA_PULSE_LEN; + pause_0_len = IRSND_MATSUSHITA_0_PAUSE_LEN - 1; + has_stop_bit = MATSUSHITA_STOP_BIT; + complete_data_len = TECHNICS_COMPLETE_DATA_LEN; // here TECHNICS + n_auto_repetitions = 1; // 1 frame + auto_repetition_pause_len = 0; + repeat_frame_pause_len = IRSND_MATSUSHITA_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_36_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 + case IRMP_KASEIKYO_PROTOCOL: + { + startbit_pulse_len = IRSND_KASEIKYO_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_KASEIKYO_START_BIT_PAUSE_LEN - 1; + pulse_1_len = IRSND_KASEIKYO_PULSE_LEN; + pause_1_len = IRSND_KASEIKYO_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_KASEIKYO_PULSE_LEN; + pause_0_len = IRSND_KASEIKYO_0_PAUSE_LEN - 1; + has_stop_bit = KASEIKYO_STOP_BIT; + complete_data_len = KASEIKYO_COMPLETE_DATA_LEN; + n_auto_repetitions = (repeat_counter == 0) ? KASEIKYO_FRAMES : 1; // 2 frames auto repetition if first frame + auto_repetition_pause_len = IRSND_KASEIKYO_AUTO_REPETITION_PAUSE_LEN; // 75 ms pause + repeat_frame_pause_len = IRSND_KASEIKYO_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_PANASONIC_PROTOCOL == 1 + case IRMP_PANASONIC_PROTOCOL: + { + startbit_pulse_len = IRSND_PANASONIC_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_PANASONIC_START_BIT_PAUSE_LEN - 1; + pulse_1_len = IRSND_PANASONIC_PULSE_LEN; + pause_1_len = IRSND_PANASONIC_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_PANASONIC_PULSE_LEN; + pause_0_len = IRSND_PANASONIC_0_PAUSE_LEN - 1; + has_stop_bit = PANASONIC_STOP_BIT; + complete_data_len = PANASONIC_COMPLETE_DATA_LEN; + n_auto_repetitions = PANASONIC_FRAMES; // 1 frame + auto_repetition_pause_len = IRSND_PANASONIC_AUTO_REPETITION_PAUSE_LEN; // 40 ms pause + repeat_frame_pause_len = IRSND_PANASONIC_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_MITSU_HEAVY_PROTOCOL == 1 + case IRMP_MITSU_HEAVY_PROTOCOL: + { + startbit_pulse_len = IRSND_MITSU_HEAVY_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_MITSU_HEAVY_START_BIT_PAUSE_LEN - 1; + pulse_1_len = IRSND_MITSU_HEAVY_PULSE_LEN; + pause_1_len = IRSND_MITSU_HEAVY_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_MITSU_HEAVY_PULSE_LEN; + pause_0_len = IRSND_MITSU_HEAVY_0_PAUSE_LEN - 1; + has_stop_bit = MITSU_HEAVY_STOP_BIT; + complete_data_len = MITSU_HEAVY_COMPLETE_DATA_LEN; + n_auto_repetitions = MITSU_HEAVY_FRAMES; // 1 frame + auto_repetition_pause_len = 0;; + repeat_frame_pause_len = IRSND_MITSU_HEAVY_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_40_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_RECS80_PROTOCOL == 1 + case IRMP_RECS80_PROTOCOL: + { + startbit_pulse_len = IRSND_RECS80_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_RECS80_START_BIT_PAUSE_LEN - 1; + pulse_1_len = IRSND_RECS80_PULSE_LEN; + pause_1_len = IRSND_RECS80_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_RECS80_PULSE_LEN; + pause_0_len = IRSND_RECS80_0_PAUSE_LEN - 1; + has_stop_bit = RECS80_STOP_BIT; + complete_data_len = RECS80_COMPLETE_DATA_LEN; + n_auto_repetitions = 1; // 1 frame + auto_repetition_pause_len = 0; + repeat_frame_pause_len = IRSND_RECS80_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 + case IRMP_RECS80EXT_PROTOCOL: + { + startbit_pulse_len = IRSND_RECS80EXT_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_RECS80EXT_START_BIT_PAUSE_LEN - 1; + pulse_1_len = IRSND_RECS80EXT_PULSE_LEN; + pause_1_len = IRSND_RECS80EXT_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_RECS80EXT_PULSE_LEN; + pause_0_len = IRSND_RECS80EXT_0_PAUSE_LEN - 1; + has_stop_bit = RECS80EXT_STOP_BIT; + complete_data_len = RECS80EXT_COMPLETE_DATA_LEN; + n_auto_repetitions = 1; // 1 frame + auto_repetition_pause_len = 0; + repeat_frame_pause_len = IRSND_RECS80EXT_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1 + case IRMP_TELEFUNKEN_PROTOCOL: + { + startbit_pulse_len = IRSND_TELEFUNKEN_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_TELEFUNKEN_START_BIT_PAUSE_LEN - 1; + pulse_1_len = IRSND_TELEFUNKEN_PULSE_LEN; + pause_1_len = IRSND_TELEFUNKEN_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_TELEFUNKEN_PULSE_LEN; + pause_0_len = IRSND_TELEFUNKEN_0_PAUSE_LEN - 1; + has_stop_bit = TELEFUNKEN_STOP_BIT; + complete_data_len = TELEFUNKEN_COMPLETE_DATA_LEN; + n_auto_repetitions = 1; // 1 frames + auto_repetition_pause_len = 0; // IRSND_TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN; xx ms pause + repeat_frame_pause_len = IRSND_TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_RC5_PROTOCOL == 1 + case IRMP_RC5_PROTOCOL: + { + startbit_pulse_len = IRSND_RC5_BIT_LEN; + startbit_pause_len = IRSND_RC5_BIT_LEN; + pulse_len = IRSND_RC5_BIT_LEN; + pause_len = IRSND_RC5_BIT_LEN; + has_stop_bit = RC5_STOP_BIT; + complete_data_len = RC5_COMPLETE_DATA_LEN; + n_auto_repetitions = 1; // 1 frame + auto_repetition_pause_len = 0; + repeat_frame_pause_len = IRSND_RC5_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_36_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_RC6_PROTOCOL == 1 + case IRMP_RC6_PROTOCOL: + { + startbit_pulse_len = IRSND_RC6_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_RC6_START_BIT_PAUSE_LEN - 1; + pulse_len = IRSND_RC6_BIT_LEN; + pause_len = IRSND_RC6_BIT_LEN; + has_stop_bit = RC6_STOP_BIT; + complete_data_len = RC6_COMPLETE_DATA_LEN_SHORT; + n_auto_repetitions = 1; // 1 frame + auto_repetition_pause_len = 0; + repeat_frame_pause_len = IRSND_RC6_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_36_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_RC6A_PROTOCOL == 1 + case IRMP_RC6A_PROTOCOL: + { + startbit_pulse_len = IRSND_RC6_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_RC6_START_BIT_PAUSE_LEN - 1; + pulse_len = IRSND_RC6_BIT_LEN; + pause_len = IRSND_RC6_BIT_LEN; + has_stop_bit = RC6_STOP_BIT; + complete_data_len = RC6_COMPLETE_DATA_LEN_LONG; + n_auto_repetitions = 1; // 1 frame + auto_repetition_pause_len = 0; + repeat_frame_pause_len = IRSND_RC6_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_36_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_DENON_PROTOCOL == 1 + case IRMP_DENON_PROTOCOL: + { + startbit_pulse_len = 0x00; + startbit_pause_len = 0x00; + pulse_1_len = IRSND_DENON_PULSE_LEN; + pause_1_len = IRSND_DENON_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_DENON_PULSE_LEN; + pause_0_len = IRSND_DENON_0_PAUSE_LEN - 1; + has_stop_bit = DENON_STOP_BIT; + complete_data_len = DENON_COMPLETE_DATA_LEN; + n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command + auto_repetition_pause_len = IRSND_DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame + repeat_frame_pause_len = IRSND_DENON_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_36_KHZ); // in theory 32kHz, in practice 36kHz is better + break; + } +#endif +#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1 + case IRMP_THOMSON_PROTOCOL: + { + startbit_pulse_len = 0x00; + startbit_pause_len = 0x00; + pulse_1_len = IRSND_THOMSON_PULSE_LEN; + pause_1_len = IRSND_THOMSON_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_THOMSON_PULSE_LEN; + pause_0_len = IRSND_THOMSON_0_PAUSE_LEN - 1; + has_stop_bit = THOMSON_STOP_BIT; + complete_data_len = THOMSON_COMPLETE_DATA_LEN; + n_auto_repetitions = THOMSON_FRAMES; // only 1 frame + auto_repetition_pause_len = IRSND_THOMSON_AUTO_REPETITION_PAUSE_LEN; + repeat_frame_pause_len = IRSND_THOMSON_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_BOSE_PROTOCOL == 1 + case IRMP_BOSE_PROTOCOL: + { + startbit_pulse_len = IRSND_BOSE_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_BOSE_START_BIT_PAUSE_LEN - 1; + pulse_1_len = IRSND_BOSE_PULSE_LEN; + pause_1_len = IRSND_BOSE_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_BOSE_PULSE_LEN; + pause_0_len = IRSND_BOSE_0_PAUSE_LEN - 1; + has_stop_bit = BOSE_STOP_BIT; + complete_data_len = BOSE_COMPLETE_DATA_LEN; + n_auto_repetitions = BOSE_FRAMES; // 1 frame + auto_repetition_pause_len = IRSND_BOSE_AUTO_REPETITION_PAUSE_LEN; // 40 ms pause + repeat_frame_pause_len = IRSND_BOSE_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_36_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1 + case IRMP_NUBERT_PROTOCOL: + { + startbit_pulse_len = IRSND_NUBERT_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_NUBERT_START_BIT_PAUSE_LEN - 1; + pulse_1_len = IRSND_NUBERT_1_PULSE_LEN; + pause_1_len = IRSND_NUBERT_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_NUBERT_0_PULSE_LEN; + pause_0_len = IRSND_NUBERT_0_PAUSE_LEN - 1; + has_stop_bit = NUBERT_STOP_BIT; + complete_data_len = NUBERT_COMPLETE_DATA_LEN; + n_auto_repetitions = NUBERT_FRAMES; // 2 frames + auto_repetition_pause_len = IRSND_NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause + repeat_frame_pause_len = IRSND_NUBERT_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_36_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_FAN_PROTOCOL == 1 + case IRMP_FAN_PROTOCOL: + { + startbit_pulse_len = IRSND_FAN_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_FAN_START_BIT_PAUSE_LEN - 1; + pulse_1_len = IRSND_FAN_1_PULSE_LEN; + pause_1_len = IRSND_FAN_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_FAN_0_PULSE_LEN; + pause_0_len = IRSND_FAN_0_PAUSE_LEN - 1; + has_stop_bit = FAN_STOP_BIT; + complete_data_len = FAN_COMPLETE_DATA_LEN; + n_auto_repetitions = FAN_FRAMES; // only 1 frame + auto_repetition_pause_len = IRSND_FAN_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause + repeat_frame_pause_len = IRSND_FAN_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_36_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1 + case IRMP_SPEAKER_PROTOCOL: + { + startbit_pulse_len = IRSND_SPEAKER_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_SPEAKER_START_BIT_PAUSE_LEN - 1; + pulse_1_len = IRSND_SPEAKER_1_PULSE_LEN; + pause_1_len = IRSND_SPEAKER_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_SPEAKER_0_PULSE_LEN; + pause_0_len = IRSND_SPEAKER_0_PAUSE_LEN - 1; + has_stop_bit = SPEAKER_STOP_BIT; + complete_data_len = SPEAKER_COMPLETE_DATA_LEN; + n_auto_repetitions = SPEAKER_FRAMES; // 2 frames + auto_repetition_pause_len = IRSND_SPEAKER_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause + repeat_frame_pause_len = IRSND_SPEAKER_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 + case IRMP_BANG_OLUFSEN_PROTOCOL: + { + startbit_pulse_len = IRSND_BANG_OLUFSEN_START_BIT1_PULSE_LEN; + startbit_pause_len = IRSND_BANG_OLUFSEN_START_BIT1_PAUSE_LEN - 1; + pulse_1_len = IRSND_BANG_OLUFSEN_PULSE_LEN; + pause_1_len = IRSND_BANG_OLUFSEN_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_BANG_OLUFSEN_PULSE_LEN; + pause_0_len = IRSND_BANG_OLUFSEN_0_PAUSE_LEN - 1; + has_stop_bit = BANG_OLUFSEN_STOP_BIT; + complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN; + n_auto_repetitions = 1; // 1 frame + auto_repetition_pause_len = 0; + repeat_frame_pause_len = IRSND_BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN; + last_bit_value = 0; + irsnd_set_freq (IRSND_FREQ_455_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 + case IRMP_GRUNDIG_PROTOCOL: + { + startbit_pulse_len = IRSND_GRUNDIG_NOKIA_IR60_BIT_LEN; + startbit_pause_len = IRSND_GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1; + pulse_len = IRSND_GRUNDIG_NOKIA_IR60_BIT_LEN; + pause_len = IRSND_GRUNDIG_NOKIA_IR60_BIT_LEN; + has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT; + complete_data_len = GRUNDIG_COMPLETE_DATA_LEN; + n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames + auto_repetition_pause_len = IRSND_GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause + repeat_frame_pause_len = IRSND_GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_IR60_PROTOCOL == 1 + case IRMP_IR60_PROTOCOL: + { + startbit_pulse_len = IRSND_GRUNDIG_NOKIA_IR60_BIT_LEN; + startbit_pause_len = IRSND_GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1; + pulse_len = IRSND_GRUNDIG_NOKIA_IR60_BIT_LEN; + pause_len = IRSND_GRUNDIG_NOKIA_IR60_BIT_LEN; + has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT; + complete_data_len = IR60_COMPLETE_DATA_LEN; + n_auto_repetitions = IR60_FRAMES; // 2 frames + auto_repetition_pause_len = IRSND_IR60_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause + repeat_frame_pause_len = IRSND_GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause + irsnd_set_freq (IRSND_FREQ_30_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1 + case IRMP_NOKIA_PROTOCOL: + { + startbit_pulse_len = IRSND_GRUNDIG_NOKIA_IR60_BIT_LEN; + startbit_pause_len = IRSND_GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1; + pulse_len = IRSND_GRUNDIG_NOKIA_IR60_BIT_LEN; + pause_len = IRSND_GRUNDIG_NOKIA_IR60_BIT_LEN; + has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT; + complete_data_len = NOKIA_COMPLETE_DATA_LEN; + n_auto_repetitions = NOKIA_FRAMES; // 2 frames + auto_repetition_pause_len = IRSND_NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause + repeat_frame_pause_len = IRSND_GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 + case IRMP_SIEMENS_PROTOCOL: + { + startbit_pulse_len = IRSND_SIEMENS_BIT_LEN; + startbit_pause_len = IRSND_SIEMENS_BIT_LEN; + pulse_len = IRSND_SIEMENS_BIT_LEN; + pause_len = IRSND_SIEMENS_BIT_LEN; + has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT; + complete_data_len = SIEMENS_COMPLETE_DATA_LEN; + n_auto_repetitions = 1; // 1 frame + auto_repetition_pause_len = 0; + repeat_frame_pause_len = IRSND_SIEMENS_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_36_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 + case IRMP_RUWIDO_PROTOCOL: + { + startbit_pulse_len = IRSND_RUWIDO_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_RUWIDO_START_BIT_PAUSE_LEN; + pulse_len = IRSND_RUWIDO_BIT_PULSE_LEN; + pause_len = IRSND_RUWIDO_BIT_PAUSE_LEN; + has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT; + complete_data_len = RUWIDO_COMPLETE_DATA_LEN; + n_auto_repetitions = 1; // 1 frame + auto_repetition_pause_len = 0; + repeat_frame_pause_len = IRSND_RUWIDO_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_36_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_FDC_PROTOCOL == 1 + case IRMP_FDC_PROTOCOL: + { + startbit_pulse_len = IRSND_FDC_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_FDC_START_BIT_PAUSE_LEN - 1; + complete_data_len = FDC_COMPLETE_DATA_LEN; + pulse_1_len = IRSND_FDC_PULSE_LEN; + pause_1_len = IRSND_FDC_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_FDC_PULSE_LEN; + pause_0_len = IRSND_FDC_0_PAUSE_LEN - 1; + has_stop_bit = FDC_STOP_BIT; + n_auto_repetitions = 1; // 1 frame + auto_repetition_pause_len = 0; + repeat_frame_pause_len = IRSND_FDC_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1 + case IRMP_RCCAR_PROTOCOL: + { + startbit_pulse_len = IRSND_RCCAR_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_RCCAR_START_BIT_PAUSE_LEN - 1; + complete_data_len = RCCAR_COMPLETE_DATA_LEN; + pulse_1_len = IRSND_RCCAR_PULSE_LEN; + pause_1_len = IRSND_RCCAR_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_RCCAR_PULSE_LEN; + pause_0_len = IRSND_RCCAR_0_PAUSE_LEN - 1; + has_stop_bit = RCCAR_STOP_BIT; + n_auto_repetitions = 1; // 1 frame + auto_repetition_pause_len = 0; + repeat_frame_pause_len = IRSND_RCCAR_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_JVC_PROTOCOL == 1 + case IRMP_JVC_PROTOCOL: + { + if (repeat_counter != 0) // skip start bit if repetition frame + { + current_bit = 0; + } + + startbit_pulse_len = IRSND_JVC_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_JVC_START_BIT_PAUSE_LEN - 1; + complete_data_len = JVC_COMPLETE_DATA_LEN; + pulse_1_len = IRSND_JVC_PULSE_LEN; + pause_1_len = IRSND_JVC_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_JVC_PULSE_LEN; + pause_0_len = IRSND_JVC_0_PAUSE_LEN - 1; + has_stop_bit = JVC_STOP_BIT; + n_auto_repetitions = 1; // 1 frame + auto_repetition_pause_len = 0; + repeat_frame_pause_len = IRSND_JVC_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_NIKON_PROTOCOL == 1 + case IRMP_NIKON_PROTOCOL: + { + startbit_pulse_len = IRSND_NIKON_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_NIKON_START_BIT_PAUSE_LEN; + complete_data_len = NIKON_COMPLETE_DATA_LEN; + pulse_1_len = IRSND_NIKON_PULSE_LEN; + pause_1_len = IRSND_NIKON_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_NIKON_PULSE_LEN; + pause_0_len = IRSND_NIKON_0_PAUSE_LEN - 1; + has_stop_bit = NIKON_STOP_BIT; + n_auto_repetitions = 1; // 1 frame + auto_repetition_pause_len = 0; + repeat_frame_pause_len = IRSND_NIKON_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_LEGO_PROTOCOL == 1 + case IRMP_LEGO_PROTOCOL: + { + startbit_pulse_len = IRSND_LEGO_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_LEGO_START_BIT_PAUSE_LEN - 1; + complete_data_len = LEGO_COMPLETE_DATA_LEN; + pulse_1_len = IRSND_LEGO_PULSE_LEN; + pause_1_len = IRSND_LEGO_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_LEGO_PULSE_LEN; + pause_0_len = IRSND_LEGO_0_PAUSE_LEN - 1; + has_stop_bit = LEGO_STOP_BIT; + n_auto_repetitions = 1; // 1 frame + auto_repetition_pause_len = 0; + repeat_frame_pause_len = IRSND_LEGO_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_IRMP16_PROTOCOL == 1 + case IRMP_IRMP16_PROTOCOL: + { + startbit_pulse_len = IRSND_IRMP16_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_IRMP16_START_BIT_PAUSE_LEN - 1; + complete_data_len = IRMP16_COMPLETE_DATA_LEN; + pulse_1_len = IRSND_IRMP16_PULSE_LEN; + pause_1_len = IRSND_IRMP16_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_IRMP16_PULSE_LEN; + pause_0_len = IRSND_IRMP16_0_PAUSE_LEN - 1; + has_stop_bit = IRMP16_STOP_BIT; + n_auto_repetitions = 1; // 1 frame + auto_repetition_pause_len = 0; + repeat_frame_pause_len = IRSND_IRMP16_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1 + case IRMP_A1TVBOX_PROTOCOL: + { + startbit_pulse_len = IRSND_A1TVBOX_BIT_PULSE_LEN; // don't use A1TVBOX_START_BIT_PULSE_LEN + startbit_pause_len = IRSND_A1TVBOX_BIT_PAUSE_LEN; // don't use A1TVBOX_START_BIT_PAUSE_LEN + pulse_len = IRSND_A1TVBOX_BIT_PULSE_LEN; + pause_len = IRSND_A1TVBOX_BIT_PAUSE_LEN; + has_stop_bit = A1TVBOX_STOP_BIT; + complete_data_len = A1TVBOX_COMPLETE_DATA_LEN + 1; // we send stop bit as data + n_auto_repetitions = 1; // 1 frame + auto_repetition_pause_len = 0; + repeat_frame_pause_len = IRSND_A1TVBOX_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1 + case IRMP_ROOMBA_PROTOCOL: + { + startbit_pulse_len = IRSND_ROOMBA_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_ROOMBA_START_BIT_PAUSE_LEN; + pulse_1_len = IRSND_ROOMBA_1_PULSE_LEN; + pause_1_len = IRSND_ROOMBA_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_ROOMBA_0_PULSE_LEN; + pause_0_len = IRSND_ROOMBA_0_PAUSE_LEN - 1; + has_stop_bit = ROOMBA_STOP_BIT; + complete_data_len = ROOMBA_COMPLETE_DATA_LEN; + n_auto_repetitions = ROOMBA_FRAMES; // 8 frames + auto_repetition_pause_len = IRSND_ROOMBA_FRAME_REPEAT_PAUSE_LEN; + repeat_frame_pause_len = IRSND_ROOMBA_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_PENTAX_PROTOCOL == 1 + case IRMP_PENTAX_PROTOCOL: + { + startbit_pulse_len = IRSND_PENTAX_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_PENTAX_START_BIT_PAUSE_LEN; + complete_data_len = PENTAX_COMPLETE_DATA_LEN; + pulse_1_len = IRSND_PENTAX_PULSE_LEN; + pause_1_len = IRSND_PENTAX_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_PENTAX_PULSE_LEN; + pause_0_len = IRSND_PENTAX_0_PAUSE_LEN - 1; + has_stop_bit = PENTAX_STOP_BIT; + n_auto_repetitions = 1; // 1 frame + auto_repetition_pause_len = 0; + repeat_frame_pause_len = IRSND_PENTAX_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_ACP24_PROTOCOL == 1 + case IRMP_ACP24_PROTOCOL: + { + startbit_pulse_len = IRSND_ACP24_START_BIT_PULSE_LEN; + startbit_pause_len = IRSND_ACP24_START_BIT_PAUSE_LEN - 1; + complete_data_len = ACP24_COMPLETE_DATA_LEN; + pulse_1_len = IRSND_ACP24_PULSE_LEN; + pause_1_len = IRSND_ACP24_1_PAUSE_LEN - 1; + pulse_0_len = IRSND_ACP24_PULSE_LEN; + pause_0_len = IRSND_ACP24_0_PAUSE_LEN - 1; + has_stop_bit = ACP24_STOP_BIT; + n_auto_repetitions = 1; // 1 frame + auto_repetition_pause_len = 0; + repeat_frame_pause_len = IRSND_ACP24_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } +#endif + default: + { + irsnd_busy = FALSE; + break; + } + } + } + } + + if (irsnd_busy) + { + new_frame = FALSE; + + switch (irsnd_protocol) + { +#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 + case IRMP_SIRCS_PROTOCOL: +#endif +#if IRSND_SUPPORT_NEC_PROTOCOL == 1 + case IRMP_NEC_PROTOCOL: + case IRMP_NEC_REPETITION_PROTOCOL: + case IRMP_ONKYO_PROTOCOL: +#endif +#if IRSND_SUPPORT_NEC16_PROTOCOL == 1 + case IRMP_NEC16_PROTOCOL: +#endif +#if IRSND_SUPPORT_NEC42_PROTOCOL == 1 + case IRMP_NEC42_PROTOCOL: +#endif +#if IRSND_SUPPORT_MELINERA_PROTOCOL == 1 + case IRMP_MELINERA_PROTOCOL: +#endif +#if IRSND_SUPPORT_LGAIR_PROTOCOL == 1 + case IRMP_LGAIR_PROTOCOL: +#endif +#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 + case IRMP_SAMSUNG_PROTOCOL: + case IRMP_SAMSUNG32_PROTOCOL: +#endif +#if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1 + case IRMP_SAMSUNG48_PROTOCOL: +#endif +#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 + case IRMP_MATSUSHITA_PROTOCOL: +#endif +#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 + case IRMP_TECHNICS_PROTOCOL: +#endif +#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 + case IRMP_KASEIKYO_PROTOCOL: +#endif +#if IRSND_SUPPORT_PANASONIC_PROTOCOL == 1 + case IRMP_PANASONIC_PROTOCOL: +#endif +#if IRSND_SUPPORT_MITSU_HEAVY_PROTOCOL == 1 + case IRMP_MITSU_HEAVY_PROTOCOL: +#endif +#if IRSND_SUPPORT_RECS80_PROTOCOL == 1 + case IRMP_RECS80_PROTOCOL: +#endif +#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 + case IRMP_RECS80EXT_PROTOCOL: +#endif +#if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1 + case IRMP_TELEFUNKEN_PROTOCOL: +#endif +#if IRSND_SUPPORT_DENON_PROTOCOL == 1 + case IRMP_DENON_PROTOCOL: +#endif +#if IRSND_SUPPORT_BOSE_PROTOCOL == 1 + case IRMP_BOSE_PROTOCOL: +#endif +#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1 + case IRMP_NUBERT_PROTOCOL: +#endif +#if IRSND_SUPPORT_FAN_PROTOCOL == 1 + case IRMP_FAN_PROTOCOL: +#endif +#if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1 + case IRMP_SPEAKER_PROTOCOL: +#endif +#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 + case IRMP_BANG_OLUFSEN_PROTOCOL: +#endif +#if IRSND_SUPPORT_FDC_PROTOCOL == 1 + case IRMP_FDC_PROTOCOL: +#endif +#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1 + case IRMP_RCCAR_PROTOCOL: +#endif +#if IRSND_SUPPORT_JVC_PROTOCOL == 1 + case IRMP_JVC_PROTOCOL: +#endif +#if IRSND_SUPPORT_NIKON_PROTOCOL == 1 + case IRMP_NIKON_PROTOCOL: +#endif +#if IRSND_SUPPORT_LEGO_PROTOCOL == 1 + case IRMP_LEGO_PROTOCOL: +#endif +#if IRSND_SUPPORT_IRMP16_PROTOCOL == 1 + case IRMP_IRMP16_PROTOCOL: +#endif +#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1 + case IRMP_THOMSON_PROTOCOL: +#endif +#if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1 + case IRMP_ROOMBA_PROTOCOL: +#endif +#if IRSND_SUPPORT_PENTAX_PROTOCOL == 1 + case IRMP_PENTAX_PROTOCOL: +#endif +#if IRSND_SUPPORT_ACP24_PROTOCOL == 1 + case IRMP_ACP24_PROTOCOL: +#endif + +#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \ + IRSND_SUPPORT_LGAIR_PROTOCOL == 1 || IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || IRSND_SUPPORT_TECHNICS_PROTOCOL == 1 || \ + IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \ + IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_FAN_PROTOCOL == 1 || IRSND_SUPPORT_SPEAKER_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || \ + IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || \ + IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 || IRSND_SUPPORT_ROOMBA_PROTOCOL == 1 || IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1 || \ + IRSND_SUPPORT_PENTAX_PROTOCOL == 1 || IRSND_SUPPORT_ACP24_PROTOCOL == 1 || IRSND_SUPPORT_PANASONIC_PROTOCOL == 1 || IRSND_SUPPORT_BOSE_PROTOCOL == 1 || \ + IRSND_SUPPORT_MITSU_HEAVY_PROTOCOL == 1 || IRSND_SUPPORT_IRMP16_PROTOCOL == 1 || IRSND_SUPPORT_MELINERA_PROTOCOL + { + if (pulse_counter == 0) + { + if (current_bit == 0xFF) // send start bit + { + pulse_len = startbit_pulse_len; + pause_len = startbit_pause_len; + } + else if (current_bit < complete_data_len) // send n'th bit + { +#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 + if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL) + { + if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits + { + pulse_len = IRSND_SAMSUNG_PULSE_LEN; + pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? + (IRSND_SAMSUNG_1_PAUSE_LEN - 1) : (IRSND_SAMSUNG_0_PAUSE_LEN - 1); + } + else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit) + { + pulse_len = IRSND_SAMSUNG_PULSE_LEN; + pause_len = IRSND_SAMSUNG_START_BIT_PAUSE_LEN - 1; + } + else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit + { + uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 ! + + pulse_len = IRSND_SAMSUNG_PULSE_LEN; + pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ? + (IRSND_SAMSUNG_1_PAUSE_LEN - 1) : (IRSND_SAMSUNG_0_PAUSE_LEN - 1); + } + } + else +#endif + +#if IRSND_SUPPORT_NEC16_PROTOCOL == 1 + if (irsnd_protocol == IRMP_NEC16_PROTOCOL) + { + if (current_bit < NEC16_ADDRESS_LEN) // send address bits + { + pulse_len = IRSND_NEC_PULSE_LEN; + pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? + (IRSND_NEC_1_PAUSE_LEN - 1) : (IRSND_NEC_0_PAUSE_LEN - 1); + } + else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit) + { + pulse_len = IRSND_NEC_PULSE_LEN; + pause_len = IRSND_NEC_START_BIT_PAUSE_LEN - 1; + } + else if (current_bit < NEC16_COMPLETE_DATA_LEN + 1) // send n'th bit + { + uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 ! + + pulse_len = IRSND_NEC_PULSE_LEN; + pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ? + (IRSND_NEC_1_PAUSE_LEN - 1) : (IRSND_NEC_0_PAUSE_LEN - 1); + } + } + else +#endif + +#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 + if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL) + { + if (current_bit == 0) // send 2nd start bit + { + pulse_len = IRSND_BANG_OLUFSEN_START_BIT2_PULSE_LEN; + pause_len = IRSND_BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1; + } + else if (current_bit == 1) // send 3rd start bit + { + pulse_len = IRSND_BANG_OLUFSEN_START_BIT3_PULSE_LEN; + pause_len = IRSND_BANG_OLUFSEN_START_BIT3_PAUSE_LEN - 1; + } + else if (current_bit == 2) // send 4th start bit + { + pulse_len = IRSND_BANG_OLUFSEN_START_BIT2_PULSE_LEN; + pause_len = IRSND_BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1; + } + else if (current_bit == 19) // send trailer bit + { + pulse_len = IRSND_BANG_OLUFSEN_PULSE_LEN; + pause_len = IRSND_BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN - 1; + } + else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit + { + uint8_t cur_bit_value = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? 1 : 0; + pulse_len = IRSND_BANG_OLUFSEN_PULSE_LEN; + + if (cur_bit_value == last_bit_value) + { + pause_len = IRSND_BANG_OLUFSEN_R_PAUSE_LEN - 1; + } + else + { + pause_len = cur_bit_value ? (IRSND_BANG_OLUFSEN_1_PAUSE_LEN - 1) : (IRSND_BANG_OLUFSEN_0_PAUSE_LEN - 1); + last_bit_value = cur_bit_value; + } + } + } + else +#endif + if (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) + { + pulse_len = pulse_1_len; + pause_len = pause_1_len; + } + else + { + pulse_len = pulse_0_len; + pause_len = pause_0_len; + } + } + else if (has_stop_bit) // send stop bit + { + pulse_len = pulse_0_len; + + if (auto_repetition_counter < n_auto_repetitions) + { + pause_len = pause_0_len; + } + else + { + pause_len = 255; // last frame: pause of 255 + } + } + } + + if (pulse_counter < pulse_len) + { + if (pulse_counter == 0) + { + irsnd_on (); + } + pulse_counter++; + } + else if (pause_counter < pause_len) + { + if (pause_counter == 0) + { + irsnd_off (); + } + pause_counter++; + } + else + { + current_bit++; + + if (current_bit >= complete_data_len + has_stop_bit) + { + current_bit = 0xFF; + auto_repetition_counter++; + + if (auto_repetition_counter == n_auto_repetitions) + { + irsnd_busy = FALSE; + auto_repetition_counter = 0; + } + new_frame = TRUE; + } + + pulse_counter = 0; + pause_counter = 0; + } + break; + } +#endif + +#if IRSND_SUPPORT_RC5_PROTOCOL == 1 + case IRMP_RC5_PROTOCOL: +#endif +#if IRSND_SUPPORT_RC6_PROTOCOL == 1 + case IRMP_RC6_PROTOCOL: +#endif +#if IRSND_SUPPORT_RC6A_PROTOCOL == 1 + case IRMP_RC6A_PROTOCOL: +#endif +#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 + case IRMP_SIEMENS_PROTOCOL: +#endif +#if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 + case IRMP_RUWIDO_PROTOCOL: +#endif +#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 + case IRMP_GRUNDIG_PROTOCOL: +#endif +#if IRSND_SUPPORT_IR60_PROTOCOL == 1 + case IRMP_IR60_PROTOCOL: +#endif +#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1 + case IRMP_NOKIA_PROTOCOL: +#endif +#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1 + case IRMP_A1TVBOX_PROTOCOL: +#endif + +#if IRSND_SUPPORT_RC5_PROTOCOL == 1 || \ + IRSND_SUPPORT_RC6_PROTOCOL == 1 || \ + IRSND_SUPPORT_RC6A_PROTOCOL == 1 || \ + IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || \ + IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \ + IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || \ + IRSND_SUPPORT_IR60_PROTOCOL == 1 || \ + IRSND_SUPPORT_NOKIA_PROTOCOL == 1 || \ + IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1 + { + if (pulse_counter == pulse_len && pause_counter == pause_len) + { + current_bit++; + + if (current_bit >= complete_data_len) + { + current_bit = 0xFF; + +#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1 + if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL) + { + auto_repetition_counter++; + + if (repeat_counter > 0) + { // set 117 msec pause time + auto_repetition_pause_len = IRSND_GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; + } + + if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame + { + n_auto_repetitions++; // increment number of auto repetitions + repeat_counter++; + } + else if (auto_repetition_counter == n_auto_repetitions) + { + irsnd_busy = FALSE; + auto_repetition_counter = 0; + } + } + else +#endif + { + irsnd_busy = FALSE; + } + + new_frame = TRUE; + irsnd_off (); + } + + pulse_counter = 0; + pause_counter = 0; + } + + if (! new_frame) + { + uint8_t first_pulse; + +#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1 + if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL) + { + if (current_bit == 0xFF || // start bit of start-frame + (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig) + (irsnd_protocol == IRMP_IR60_PROTOCOL && current_bit == 7) || // start bit of data frame (IR60) + (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia) + { + pulse_len = startbit_pulse_len; + pause_len = startbit_pause_len; + first_pulse = TRUE; + } + else // send n'th bit + { + pulse_len = IRSND_GRUNDIG_NOKIA_IR60_BIT_LEN; + pause_len = IRSND_GRUNDIG_NOKIA_IR60_BIT_LEN; + first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE; + } + } + else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL || + // irsnd_protocol == IRMP_SIEMENS_PROTOCOL || irsnd_protocol == IRMP_RUWIDO_PROTOCOL) +#endif + { + if (current_bit == 0xFF) // 1 start bit + { +#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1 + if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL) + { + pulse_len = startbit_pulse_len; + pause_len = startbit_pause_len; + } + else +#endif +#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1 + if (irsnd_protocol == IRMP_A1TVBOX_PROTOCOL) + { + current_bit = 0; + } + else +#endif + { + ; + } + + first_pulse = TRUE; + } + else // send n'th bit + { +#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1 + if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL) + { + pulse_len = IRSND_RC6_BIT_LEN; + pause_len = IRSND_RC6_BIT_LEN; + + if (irsnd_protocol == IRMP_RC6_PROTOCOL) + { + if (current_bit == 4) // toggle bit (double len) + { + pulse_len = IRSND_RC6_BIT_2_LEN; // = 2 * RC_BIT_LEN + pause_len = IRSND_RC6_BIT_2_LEN; // = 2 * RC_BIT_LEN + } + } + else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL) + { + if (current_bit == 4) // toggle bit (double len) + { + pulse_len = IRSND_RC6_BIT_3_LEN; // = 3 * RC6_BIT_LEN + pause_len = IRSND_RC6_BIT_2_LEN; // = 2 * RC6_BIT_LEN + } + else if (current_bit == 5) // toggle bit (double len) + { + pause_len = IRSND_RC6_BIT_2_LEN; // = 2 * RC6_BIT_LEN + } + } + } +#endif + first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE; + } + + if (irsnd_protocol == IRMP_RC5_PROTOCOL) + { + first_pulse = first_pulse ? FALSE : TRUE; + } + } + + if (first_pulse) + { + // printf ("first_pulse: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len); + + if (pulse_counter < pulse_len) + { + if (pulse_counter == 0) + { + irsnd_on (); + } + pulse_counter++; + } + else // if (pause_counter < pause_len) + { + if (pause_counter == 0) + { + irsnd_off (); + } + pause_counter++; + } + } + else + { + // printf ("first_pause: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len); + + if (pause_counter < pause_len) + { + if (pause_counter == 0) + { + irsnd_off (); + } + pause_counter++; + } + else // if (pulse_counter < pulse_len) + { + if (pulse_counter == 0) + { + irsnd_on (); + } + pulse_counter++; + } + } + } + break; + } +#endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || + // IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1 + + default: + { + irsnd_busy = FALSE; + break; + } + } + } + + if (! irsnd_busy) + { + if (repeat_counter < n_repeat_frames) + { +#if IRSND_SUPPORT_FDC_PROTOCOL == 1 + if (irsnd_protocol == IRMP_FDC_PROTOCOL) + { + irsnd_buffer[2] |= 0x0F; + } +#endif + repeat_counter++; + irsnd_busy = TRUE; + } + else + { + irsnd_busy = TRUE; //Rainer + send_trailer = TRUE; + n_repeat_frames = 0; + repeat_counter = 0; + } + } + } + +#ifdef ANALYZE + if (irsnd_is_on) + { + putchar ('0'); + } + else + { + putchar ('1'); + } +#endif + + return irsnd_busy; +} + +#ifdef ANALYZE + +// main function - for unix/linux + windows only! +// AVR: see main.c! +// Compile it under linux with: +// cc irsnd.c -o irsnd +// +// usage: ./irsnd protocol hex-address hex-command >filename + +int +main (int argc, char ** argv) +{ + int protocol; + int address; + int command; + IRMP_DATA irmp_data; + + if (argc != 4 && argc != 5) + { + fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]); + return 1; + } + + if (sscanf (argv[1], "%d", &protocol) == 1 && + sscanf (argv[2], "%x", &address) == 1 && + sscanf (argv[3], "%x", &command) == 1) + { + irmp_data.protocol = protocol; + irmp_data.address = address; + irmp_data.command = command; + + if (argc == 5) + { + irmp_data.flags = atoi (argv[4]); + } + else + { + irmp_data.flags = 0; + } + + irsnd_init (); + + (void) irsnd_send_data (&irmp_data, TRUE); + + while (irsnd_busy) + { + irsnd_ISR (); + } + + putchar ('\n'); + +#if 0 // enable here to send twice + (void) irsnd_send_data (&irmp_data, TRUE); + + while (irsnd_busy) + { + irsnd_ISR (); + } + + putchar ('\n'); +#endif + } + else + { + fprintf (stderr, "%s: wrong arguments\n", argv[0]); + return 1; + } + return 0; +} + +#endif // ANALYZE diff --git a/irsnd.h b/irsnd.h new file mode 100644 index 0000000..3d07fd1 --- /dev/null +++ b/irsnd.h @@ -0,0 +1,158 @@ + /*--------------------------------------------------------------------------------------------------------------------------------------------------- + * irsnd.h + * + * Copyright (c) 2010-2020 Frank Meyer - frank(at)fli4l.de + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ + +#ifndef _IRSND_H_ +#define _IRSND_H_ + +#include "irmpsystem.h" +#ifndef IRSND_USE_AS_LIB +# include "irsndconfig.h" +#endif + +#ifdef ARDUINO +# include "irsndArduinoExt.h" + +#elif defined (ARM_STM32) // STM32 +# define _CONCAT(a,b) a##b +# define CONCAT(a,b) _CONCAT(a,b) +# define IRSND_PORT CONCAT(GPIO, IRSND_PORT_LETTER) +# if defined (ARM_STM32L1XX) +# define IRSND_PORT_RCC CONCAT(RCC_AHBPeriph_GPIO, IRSND_PORT_LETTER) +# define IRSND_GPIO_AF CONCAT(GPIO_AF_TIM, IRSND_TIMER_NUMBER) +# elif defined (ARM_STM32F10X) +# define IRSND_PORT_RCC CONCAT(RCC_APB2Periph_GPIO, IRSND_PORT_LETTER) +# elif defined (ARM_STM32F30X) +# define IRSND_PORT_RCC CONCAT(RCC_AHBPeriph_GPIO, IRSND_PORT_LETTER) +# elif defined (ARM_STM32F4XX) +# define IRSND_PORT_RCC CONCAT(RCC_AHB1Periph_GPIO, IRSND_PORT_LETTER) +# define IRSND_GPIO_AF CONCAT(GPIO_AF_TIM, IRSND_TIMER_NUMBER) +# endif +# define IRSND_BIT CONCAT(GPIO_Pin_, IRSND_BIT_NUMBER) +# define IRSND_TIMER CONCAT(TIM, IRSND_TIMER_NUMBER) +# define IRSND_TIMER_CHANNEL CONCAT(TIM_Channel_, IRSND_TIMER_CHANNEL_NUMBER) +# if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14)) +# define IRSND_TIMER_RCC CONCAT(RCC_APB1Periph_TIM, IRSND_TIMER_NUMBER) +# elif (IRSND_TIMER_NUMBER == 1) || ((IRSND_TIMER_NUMBER >= 8) && (IRSND_TIMER_NUMBER <= 11)) +# define IRSND_TIMER_RCC CONCAT(RCC_APB2Periph_TIM, IRSND_TIMER_NUMBER) +# else +# error IRSND_TIMER_NUMBER not valid. +# endif +# ifndef USE_STDPERIPH_DRIVER +# warning The STM32 port of IRSND uses the ST standard peripheral drivers which are not enabled in your build configuration. +# endif + +#elif defined(PIC_C18) + +# if defined(__12F1840) + // Do not change lines below unless you have a different HW. This example is for 12F1840 + // setup macro for PWM used PWM module + + //~ # define PWMon() TMR2=0,IRSND_PIN=1 + //~ # define PWMoff() CCP1CON &=(~0b1100) + //~ # define PWMon() TMR2ON=1 + //~ # define PWMoff() TMR2ON=0 + #if defined(IRSND_DEBUG) + #define PWMon() LATA0=1 + #define PWMoff() LATA0=0 + #define IRSND_PIN LATA0 + #else + # define PWMon() TMR2=0,CCP1CON |=0b1100 + # define PWMoff() CCP1CON &=(~0b1100) + # define IRSND_PIN RA2 + #endif + +#else + // Do not change lines below until you have a different HW. Example is for 18F2550/18F4550 + // setup macro for PWM used PWM module + # if IRSND_OCx == IRSND_PIC_CCP2 + # define PWMon() TMR2=0,CCP2CON |=0b1100 + # define PWMoff() CCP2CON &=(~0b1100) + # define IRSND_PIN TRISCbits.TRISC1 // RC1 = PWM2 + # define SetDCPWM(x) SetDCPWM2(x) + # define ClosePWM ClosePWM2 + # define OpenPWM(x) OpenPWM2(x) + # endif + # if IRSND_OCx == IRSND_PIC_CCP1 + # define PWMon() TMR2=0,CCP1CON |=0b1100 + # define PWMoff() CCP1CON &=(~0b1100) + # define IRSND_PIN TRISCbits.TRISC2 // RC2 = PWM1 + # define SetDCPWM(x) SetDCPWM1(x) + # define ClosePWM ClosePWM1 + # define OpenPWM(x) OpenPWM1(x) + # endif +# endif +# endif // PIC_C18 + +#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 && F_INTERRUPTS < 15000 +# warning F_INTERRUPTS too low, SIEMENS protocol disabled (should be at least 15000) +# undef IRSND_SUPPORT_SIEMENS_PROTOCOL +# define IRSND_SUPPORT_SIEMENS_PROTOCOL 0 +#endif + +#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1 && F_INTERRUPTS < 15000 +# warning F_INTERRUPTS too low, A1TVBOX protocol disabled (should be at least 15000) +# undef IRSND_SUPPORT_A1TVBOX_PROTOCOL +# define IRSND_SUPPORT_A1TVBOX_PROTOCOL 0 +#endif + +#if IRSND_SUPPORT_RECS80_PROTOCOL == 1 && F_INTERRUPTS < 15000 +# warning F_INTERRUPTS too low, RECS80 protocol disabled (should be at least 15000) +# undef IRSND_SUPPORT_RECS80_PROTOCOL +# define IRSND_SUPPORT_RECS80_PROTOCOL 0 +#endif + +#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 && F_INTERRUPTS < 15000 +# warning F_INTERRUPTS too low, RECS80EXT protocol disabled (should be at least 15000) +# undef IRSND_SUPPORT_RECS80EXT_PROTOCOL +# define IRSND_SUPPORT_RECS80EXT_PROTOCOL 0 +#endif + +#if IRSND_SUPPORT_LEGO_PROTOCOL == 1 && F_INTERRUPTS < 20000 +# warning F_INTERRUPTS too low, LEGO protocol disabled (should be at least 20000) +# undef IRSND_SUPPORT_LEGO_PROTOCOL +# define IRSND_SUPPORT_LEGO_PROTOCOL 0 +#endif + +#include "irmpprotocols.h" + +#define IRSND_NO_REPETITIONS 0 // no repetitions +#define IRSND_MAX_REPETITIONS 14 // max # of repetitions +#define IRSND_ENDLESS_REPETITION 15 // endless repetions +#define IRSND_REPETITION_MASK 0x0F // lower nibble of flags +#define IRSND_RAW_REPETITION_FRAME 0x10 // send one or more raw repetition frames, yet only used for NEC + +#ifdef __cplusplus +extern "C" +{ +#endif + +extern void irsnd_init (void); +# ifdef __cplusplus +extern bool irsnd_is_busy (void); +extern bool irsnd_send_data (IRMP_DATA *, uint8_t); +extern bool irsnd_ISR (void); +#else +extern uint8_t irsnd_is_busy (void); +extern uint8_t irsnd_send_data (IRMP_DATA *, uint8_t); +extern uint8_t irsnd_ISR (void); +#endif +extern void irsnd_stop (void); + +#if IRSND_USE_CALLBACK == 1 +extern void irsnd_set_callback_ptr (void (*cb)(uint8_t)); +#endif // IRSND_USE_CALLBACK == 1 + +#ifdef __cplusplus +} +#endif + +#endif /* _IRSND_H_ */ diff --git a/irsndconfig.h b/irsndconfig.h new file mode 100644 index 0000000..dd0037d --- /dev/null +++ b/irsndconfig.h @@ -0,0 +1,199 @@ +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * irsndconfig.h + * + * DO NOT INCLUDE THIS FILE, WILL BE INCLUDED BY IRSND.H! + * + * Copyright (c) 2010-2020 Frank Meyer - frank(at)fli4l.de + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ + +#ifndef _IRSNDCONFIG_H_ +#define _IRSNDCONFIG_H_ + +#if !defined(_IRSND_H_) +# error please include only irsnd.h, not irsndconfig.h +#endif + +// #define IRSND_DEBUG 1 // activate debugging + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * F_INTERRUPTS: number of interrupts per second, should be in the range from 10000 to 20000, typically 15000 + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#ifndef F_INTERRUPTS +# define F_INTERRUPTS 15000 // interrupts per second +#endif + +#if ! defined(ARDUINO) +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * Change settings from 1 to 0 if you want to disable one or more encoders. + * This saves program space. + * 1 enable encoder + * 0 disable encoder + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ + +// typical protocols, disable here! Enable Remarks F_INTERRUPTS Program Space +#define IRSND_SUPPORT_SIRCS_PROTOCOL 1 // Sony SIRCS >= 10000 ~200 bytes +#define IRSND_SUPPORT_NEC_PROTOCOL 1 // NEC + APPLE >= 10000 ~100 bytes +#define IRSND_SUPPORT_SAMSUNG_PROTOCOL 1 // Samsung + Samsung32 >= 10000 ~300 bytes +#define IRSND_SUPPORT_MATSUSHITA_PROTOCOL 1 // Matsushita >= 10000 ~200 bytes +#define IRSND_SUPPORT_KASEIKYO_PROTOCOL 1 // Kaseikyo >= 10000 ~300 bytes + +// more protocols, enable here! Enable Remarks F_INTERRUPTS Program Space +#define IRSND_SUPPORT_DENON_PROTOCOL 0 // DENON, Sharp >= 10000 ~200 bytes +#define IRSND_SUPPORT_RC5_PROTOCOL 0 // RC5 >= 10000 ~150 bytes +#define IRSND_SUPPORT_RC6_PROTOCOL 1 // RC6 >= 10000 ~250 bytes +#define IRSND_SUPPORT_RC6A_PROTOCOL 1 // RC6A >= 10000 ~250 bytes +#define IRSND_SUPPORT_JVC_PROTOCOL 0 // JVC >= 10000 ~150 bytes +#define IRSND_SUPPORT_NEC16_PROTOCOL 0 // NEC16 >= 10000 ~150 bytes +#define IRSND_SUPPORT_NEC42_PROTOCOL 0 // NEC42 >= 10000 ~150 bytes +#define IRSND_SUPPORT_IR60_PROTOCOL 0 // IR60 (SDA2008) >= 10000 ~250 bytes +#define IRSND_SUPPORT_GRUNDIG_PROTOCOL 0 // Grundig >= 10000 ~300 bytes +#define IRSND_SUPPORT_SIEMENS_PROTOCOL 0 // Siemens, Gigaset >= 15000 ~150 bytes +#define IRSND_SUPPORT_NOKIA_PROTOCOL 0 // Nokia >= 10000 ~400 bytes + +// exotic protocols, enable here! Enable Remarks F_INTERRUPTS Program Space +#define IRSND_SUPPORT_BOSE_PROTOCOL 0 // BOSE >= 10000 ~100 bytes +#define IRSND_SUPPORT_KATHREIN_PROTOCOL 0 // Kathrein >= 10000 DON'T CHANGE, NOT SUPPORTED YET! +#define IRSND_SUPPORT_NUBERT_PROTOCOL 0 // NUBERT >= 10000 ~100 bytes +#define IRSND_SUPPORT_FAN_PROTOCOL 0 // FAN (ventilator) >= 10000 ~100 bytes +#define IRSND_SUPPORT_SPEAKER_PROTOCOL 0 // SPEAKER >= 10000 ~100 bytes +#define IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL 0 // Bang&Olufsen >= 10000 ~250 bytes +#define IRSND_SUPPORT_RECS80_PROTOCOL 0 // RECS80 >= 15000 ~100 bytes +#define IRSND_SUPPORT_RECS80EXT_PROTOCOL 0 // RECS80EXT >= 15000 ~100 bytes +#define IRSND_SUPPORT_THOMSON_PROTOCOL 0 // Thomson >= 10000 ~250 bytes +#define IRSND_SUPPORT_NIKON_PROTOCOL 0 // NIKON >= 10000 ~150 bytes +#define IRSND_SUPPORT_NETBOX_PROTOCOL 0 // Netbox keyboard >= 10000 DON'T CHANGE, NOT SUPPORTED YET! +#define IRSND_SUPPORT_ORTEK_PROTOCOL 0 // ORTEK (Hama) >= 10000 DON'T CHANGE, NOT SUPPORTED YET! +#define IRSND_SUPPORT_TELEFUNKEN_PROTOCOL 0 // Telefunken 1560 >= 10000 ~150 bytes +#define IRSND_SUPPORT_FDC_PROTOCOL 0 // FDC IR keyboard >= 10000 (better 15000) ~150 bytes +#define IRSND_SUPPORT_RCCAR_PROTOCOL 0 // RC CAR >= 10000 (better 15000) ~150 bytes +#define IRSND_SUPPORT_ROOMBA_PROTOCOL 0 // iRobot Roomba >= 10000 ~150 bytes +#define IRSND_SUPPORT_RUWIDO_PROTOCOL 0 // RUWIDO, T-Home >= 15000 ~250 bytes +#define IRSND_SUPPORT_A1TVBOX_PROTOCOL 0 // A1 TV BOX >= 15000 (better 20000) ~200 bytes +#define IRSND_SUPPORT_LEGO_PROTOCOL 0 // LEGO Power RC >= 20000 ~150 bytes +#define IRSND_SUPPORT_RCMM_PROTOCOL 0 // RCMM 12,24, or 32 >= 20000 DON'T CHANGE, NOT SUPPORTED YET! +#define IRSND_SUPPORT_LGAIR_PROTOCOL 0 // LG Air Condition >= 10000 ~150 bytes. +#define IRSND_SUPPORT_SAMSUNG48_PROTOCOL 0 // Samsung48 >= 10000 ~100 bytes +#define IRSND_SUPPORT_PENTAX_PROTOCOL 0 // Pentax >= 10000 ~150 bytes +#define IRSND_SUPPORT_S100_PROTOCOL 0 // S100 >= 10000 ~150 bytes +#define IRSND_SUPPORT_ACP24_PROTOCOL 0 // ACP24 >= 10000 ~150 bytes +#define IRSND_SUPPORT_TECHNICS_PROTOCOL 0 // TECHNICS >= 10000 DON'T CHANGE, NOT SUPPORTED YET! +#define IRSND_SUPPORT_PANASONIC_PROTOCOL 0 // PANASONIC Beamer >= 10000 ~150 bytes +#define IRSND_SUPPORT_MITSU_HEAVY_PROTOCOL 0 // Mitsubishi-Heavy Aircondition, similar Timing to Panasonic beamer +#define IRSND_SUPPORT_IRMP16_PROTOCOL 0 // IRMP specific >= 15000 ~250 bytes +#define IRSND_SUPPORT_MELINERA_PROTOCOL 0 // MELINERA (Lidl) >= 10000 ~100 bytes +#endif // ! defined(ARDUINO) + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * AVR XMega section: + * + * Change hardware pin here: IRSND_XMEGA_OC0A = OC0A on ATxmegas supporting OC0A, e.g. ATxmega128A1U + * IRSND_XMEGA_OC0B = OC0B on ATxmegas supporting OC0B, e.g. ATxmega128A1U + * IRSND_XMEGA_OC0C = OC0C on ATxmegas supporting OC0C, e.g. ATxmega128A1U + * IRSND_XMEGA_OC0D = OC0D on ATxmegas supporting OC0D, e.g. ATxmega128A1U + * IRSND_XMEGA_OC1A = OC1A on ATxmegas supporting OC1A, e.g. ATxmega128A1U + * IRSND_XMEGA_OC1B = OC1B on ATxmegas supporting OC1B, e.g. ATxmega128A1U + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#if defined(__AVR_XMEGA__) // XMEGA +# define IRSND_PORT_PRE PORTD +# define XMEGA_Timer TCD0 +# define IRSND_OCx IRSND_XMEGA_OC0B // use OC0B + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * AVR ATMega/ATTiny section: + * + * Change hardware pin here: IRSND_OC2 = OC2 on ATmegas supporting OC2, e.g. ATmega8 + * IRSND_OC2A = OC2A on ATmegas supporting OC2A, e.g. ATmega88 + * IRSND_OC2B = OC2B on ATmegas supporting OC2B, e.g. ATmega88 + * IRSND_OC0 = OC0 on ATmegas supporting OC0, e.g. ATmega162 + * IRSND_OC0A = OC0A on ATmegas/ATtinys supporting OC0A, e.g. ATtiny84, ATtiny85, ATtiny87/167 + * IRSND_OC0B = OC0B on ATmegas/ATtinys supporting OC0B, e.g. ATtiny84, ATtiny85 + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#elif defined(ATMEL_AVR) +# define IRSND_OCx IRSND_OC2 // use OC2B + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * PIC C18 or XC8 section: + * + * Change hardware pin here: IRSND_PIC_CCP1 = RC2 on PIC 18F2550/18F4550, ... + * IRSND_PIC_CCP2 = RC1 on PIC 18F2550/18F4550, ... + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#elif defined(PIC_C18) // C18 or XC8 compiler +# if defined(__12F1840) // XC8 compiler +# define Pre_Scaler 1 // define prescaler for timer2 e.g. 1,4,16 +# define F_CPU 32000000UL // PIC frequency: set your freq here +# define PIC_Scaler 2 // PIC needs /2 extra in IRSND_FREQ_32_KHZ calculation for right value + +# else // C18 compiler +# define IRSND_OCx IRSND_PIC_CCP2 // Use PWMx for PIC + // change other PIC C18 specific settings: +# define F_CPU 48000000UL // PIC frequency: set your freq here +# define Pre_Scaler 4 // define prescaler for timer2 e.g. 1,4,16 +# define PIC_Scaler 2 // PIC needs /2 extra in IRSND_FREQ_32_KHZ calculation for right value +# endif + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * ARM STM32 section: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#elif defined (ARM_STM32) // use B6 as IR output on STM32 +# define IRSND_PORT_LETTER B +# define IRSND_BIT_NUMBER 6 +# define IRSND_TIMER_NUMBER 4 +# define IRSND_TIMER_CHANNEL_NUMBER 1 // only channel 1 can be used at the moment, others won't work + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * ARM STM32 with HAL section - don't change here, define IRSND_Transmit_GPIO_Port & IRSND_Transmit_Pin in STM32Cube (Main.h) + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#elif defined (ARM_STM32_HAL) // IRSND_Transmit_GPIO_Port & IRSND_Transmit_Pin must be defined in STM32Cube +# define IRSND_PORT_LETTER IRSND_Transmit_GPIO_Port//Port of Transmit PWM Pin e.g. +# define IRSND_BIT_NUMBER IRSND_Transmit_Pin //Pim of Transmit PWM Pin e.g. +# define IRSND_TIMER_HANDLER htim2 //Handler of Timer e.g. htim (see tim.h) +# define IRSND_TIMER_CHANNEL_NUMBER TIM_CHANNEL_2 //Channel of the used Timer PWM Pin e.g. TIM_CHANNEL_2 +# define IRSND_TIMER_SPEED_APBX 64000000 //Speed of the corresponding APBx. (see STM32CubeMX: Clock Configuration) + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * Teensy 3.x with teensyduino gcc compiler + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#elif defined (TEENSY_ARM_CORTEX_M4) +# define IRSND_PIN 5 // choose an arduino pin with PWM function! + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * ESP8266 (Arduino, see IRSEND.ino) + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#elif defined (__xtensa__) +# define IRSND_PIN 0 // choose an arduino pin with PWM function! + +#elif defined(ARDUINO) +// specified here to avoid else case + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * Other target systems + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#elif !defined (UNIX_OR_WINDOWS) +# error target system not defined. +#endif + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * Use Callbacks to indicate output signal or something else + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#ifndef IRSND_USE_CALLBACK +# define IRSND_USE_CALLBACK 0 // flag: 0 = don't use callbacks, 1 = use callbacks, default is 0 +#endif + +#endif // _IRSNDCONFIG_H_