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16153c40a9
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add vias and testpoints
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2020-03-06 10:45:45 +01:00 |
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e626682c61
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somewhat finished
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2020-03-06 09:12:59 +01:00 |
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1c8fd956d5
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fix unrouted connections
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2020-02-27 17:53:20 +01:00 |
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78f4fbb4fe
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silk labels
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2020-02-27 16:49:19 +01:00 |
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3ec5d43f92
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start fixing silkscreen labels
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2020-02-27 15:29:56 +01:00 |
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d70b0a2a87
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edge cuts for 2 segment case
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2020-02-27 14:58:49 +01:00 |
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25d22f3804
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add bus connector and more layout work
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2020-02-24 04:20:34 +01:00 |
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3399bf1ca5
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galvanicly isolated bus and first layout steps
also added 1 more channel + supply voltage measurement
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2020-02-23 01:18:27 +01:00 |
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296b7ce717
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initial commit
schematic roughly done
first size tests on board layout
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2020-02-22 01:23:42 +01:00 |
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