clean up
parent
a3a7810658
commit
b814cad16f
@ -1,37 +0,0 @@
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#include "spi.h"
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void spi_select(void)
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{
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CS_PORT&=~(1<<CS_BIT);
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}
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void spi_deselect(void)
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{
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CS_PORT|=(1<<CS_BIT);
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}
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unsigned char spi_xchg(unsigned char val)
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{
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SPDR = val;
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while (!(SPSR & (1 << SPIF))) ;
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return SPDR;
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}
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uint8_t spi_read(){
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return spi_xchg(0x00);
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}
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void spi_write(uint8_t d){
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spi_xchg(d);
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}
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void spi_init(){
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CS_PORT |= (1 << CS_BIT); // pull CS pin high
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CS_DDR |= (1 << CS_BIT); // now make it an output
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SPI_PORT |= (1 << 0); // make sure SS is high
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SPI_DDR = (1 << PORTB2) | (1 << PORTB1) | (1 << PORTB0); // set MOSI, SCK and SS as output, others as input
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SPCR = (1 << SPE) | (1 << MSTR); // enable SPI, master mode 0
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SPCR |= (1 << SPR0) | (0<<SPR1); // div 128
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SPSR |= (0 << SPI2X); // set the clock rate fck/2
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}
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@ -1,20 +0,0 @@
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#ifndef _SPI_H_
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#define _SPI_H_
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#include <avr/io.h>
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#define SPI_PORT PORTB /* target-specific port containing the SPI lines */
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#define SPI_DDR DDRB /* target-specific DDR for the SPI port lines */
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#define CS_DDR DDRJ /* target-specific DDR for chip-select */
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#define CS_PORT PORTJ /* target-specific port used as chip-select */
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#define CS_BIT 3 /* target-specific port line used as chip-select */
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uint8_t spi_read();
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void spi_write(uint8_t d);
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void spi_select(void);
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void spi_deselect(void);
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unsigned char spi_xchg(unsigned char val);
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void spi_init(void);
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#endif
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