master
Eggert Jung 3 years ago
parent a3a7810658
commit b814cad16f

@ -9,12 +9,24 @@
#include "uart.h"
#include "modbus.h"
// Timer0
// 1ms IRQ
// Used for millis() timing
void timer0_init()
{
TCCR0A = (1<<WGM01); //TIMER0 SET-UP: CTC MODE
TCCR0B = (1<<CS01)|(1<<CS00); // PS 1:64
OCR0A = 249; // 1ms reach for clear (16mz:64=>250kHz:250-=>1kHz)
TIMSK0 |= 1<<OCIE0A; //IRQ on TIMER0 output compareA
}
//FUNC headers
static void avr_init(void);
void timer0_init(void);
void timer2_init(void);
void print_network_information(void);
void timer2_init()
{
TCCR2A = (1<<WGM21); //TIMER0 SET-UP: CTC MODE
TCCR2B|=(1<<CS21); //prescaler 8
OCR2A = 200;
TIMSK2|=(1<<OCIE2A);
}
void modbusGet(void) {
if (modbusGetBusState() & (1<<ReceiveCompleted))
@ -68,24 +80,27 @@ void modbusGet(void) {
int main()
{
// INIT MCU
avr_init();
wdt_enable(WDTO_2S); // set up wdt reset interval 2 second
uart_init();
ioHelperInitBuffer();
ioHelperIoConf();
timer0_init();// Timer0 millis engine init
modbusSetAddress(4);
modbusInit();
timer2_init();
uint32_t timer_blink_outs = millis();
sei();
set_Output(LED_EXTR_FEHLER, BLINK);
uint32_t timer_blink_outs = millis();
printf("moin\n");
while(1)
{
wdt_reset(); // WDT reset at least every sec
wdt_reset(); // wdt reset ~ every <2000ms
ioHelperReadPins();
ioHelperDebounce();
ioHelperEdgeDetector();
@ -99,50 +114,11 @@ int main()
outStates[2] ^= outStatesBlinking[2];
outStates[2] ^= outStatesBlinking[3];
timer_blink_outs = millis();
printf("bus state: %d\n", modbusGetBusState());
printf("DE /RE state: %d\n", PORTJ & (_BV(5)|_BV(6)) );
}
ioHelperSetOuts();
}
}
// Timer0
// 1ms IRQ
// Used for millis() timing
void timer0_init()
{
TCCR0A = (1<<WGM01); //TIMER0 SET-UP: CTC MODE
TCCR0B = (1<<CS01)|(1<<CS00); // PS 1:64
OCR0A = 249; // 1ms reach for clear (16mz:64=>250kHz:250-=>1kHz)
TIMSK0 |= 1<<OCIE0A; //IRQ on TIMER0 output compareA
}
void timer2_init()
{
TCCR2A = (1<<WGM21); //TIMER0 SET-UP: CTC MODE
TCCR2B|=(1<<CS21); //prescaler 8
OCR2A = 200;
TIMSK2|=(1<<OCIE2A);
}
static void avr_init(void)
{
// Initialize device here.
// WatchDog INIT
wdt_enable(WDTO_8S); // set up wdt reset interval 2 second
wdt_reset(); // wdt reset ~ every <2000ms
timer0_init();// Timer0 millis engine init
//timer3_init();
uart_init();
sei(); //re-enable global interrupts
return;
}
}
ISR(TIMER2_COMPA_vect) { //this ISR is called 9765.625 times per second

@ -11,10 +11,11 @@ ISR (TIMER0_COMPA_vect)
unsigned long millis(void)
{
unsigned long i;
cli();
// Atomic tick reading
i = _millis;
sei();
return i;
//unsigned long i;
//cli();
//// Atomic tick reading
//i = _millis;
//sei();
//return i;
return _millis;
}

37
spi.c

@ -1,37 +0,0 @@
#include "spi.h"
void spi_select(void)
{
CS_PORT&=~(1<<CS_BIT);
}
void spi_deselect(void)
{
CS_PORT|=(1<<CS_BIT);
}
unsigned char spi_xchg(unsigned char val)
{
SPDR = val;
while (!(SPSR & (1 << SPIF))) ;
return SPDR;
}
uint8_t spi_read(){
return spi_xchg(0x00);
}
void spi_write(uint8_t d){
spi_xchg(d);
}
void spi_init(){
CS_PORT |= (1 << CS_BIT); // pull CS pin high
CS_DDR |= (1 << CS_BIT); // now make it an output
SPI_PORT |= (1 << 0); // make sure SS is high
SPI_DDR = (1 << PORTB2) | (1 << PORTB1) | (1 << PORTB0); // set MOSI, SCK and SS as output, others as input
SPCR = (1 << SPE) | (1 << MSTR); // enable SPI, master mode 0
SPCR |= (1 << SPR0) | (0<<SPR1); // div 128
SPSR |= (0 << SPI2X); // set the clock rate fck/2
}

20
spi.h

@ -1,20 +0,0 @@
#ifndef _SPI_H_
#define _SPI_H_
#include <avr/io.h>
#define SPI_PORT PORTB /* target-specific port containing the SPI lines */
#define SPI_DDR DDRB /* target-specific DDR for the SPI port lines */
#define CS_DDR DDRJ /* target-specific DDR for chip-select */
#define CS_PORT PORTJ /* target-specific port used as chip-select */
#define CS_BIT 3 /* target-specific port line used as chip-select */
uint8_t spi_read();
void spi_write(uint8_t d);
void spi_select(void);
void spi_deselect(void);
unsigned char spi_xchg(unsigned char val);
void spi_init(void);
#endif