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Added selector SPI Speed 4/8Mhz

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master
maxxir_w 7 years ago
parent 8af605422d
commit 58c7930671
7 changed files with 65 additions and 23 deletions
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18
02_m1284p_FATFS_Chang_tst/mmc_avr.c
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@ -19,7 +19,7 @@
#include <avr/io.h> #include <avr/io.h>
#include "diskio.h" #include "diskio.h"
#include "globals.h"
/* Port controls (Platform dependent) */ /* Port controls (Platform dependent) */
@ -113,17 +113,23 @@ void power_on (void)
DDRB |= _BV(MOSI) | _BV(SCK) | _BV(CSN); DDRB |= _BV(MOSI) | _BV(SCK) | _BV(CSN);
PORTB |= _BV(MOSI) | _BV(SCK); PORTB |= _BV(MOSI) | _BV(SCK);
#if defined(SPI_8_MHZ)
/* Enables SPI, selects "master", clock rate FCK / 2, and SPI mode 0 */ /* Enables SPI, selects "master", clock rate FCK / 2, and SPI mode 0 */
// SPI 8Mhz // SPI 8Mhz
/*
SPCR = _BV(SPE) | _BV(MSTR); SPCR = _BV(SPE) | _BV(MSTR);
SPSR = _BV(SPI2X); SPSR = _BV(SPI2X); //FCK / 2 - 8Mhz
*/ #elif defined (SPI_4_MHZ)
/* Enables SPI, selects "master", clock rate FCK / 4, and SPI mode 0 */ /* Enables SPI, selects "master", clock rate FCK / 4, and SPI mode 0 */
// SPI 4Mhz // SPI 4Mhz
SPCR = _BV(SPE) | _BV(MSTR); SPCR = _BV(SPE) | _BV(MSTR);
SPSR = 0x0; SPSR = 0x0; //FCK / 4 - 4Mhz
#else
/* Enables SPI, selects "master", clock rate FCK / 4, and SPI mode 0 */
// SPI 4Mhz
SPCR = _BV(SPE) | _BV(MSTR);
SPSR = 0x0; //FCK / 4 - 4Mhz
#endif
} }

18
02_m1284p_FATFS_LFN_Chang_tst/mmc_avr.c
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@ -19,7 +19,7 @@
#include <avr/io.h> #include <avr/io.h>
#include "diskio.h" #include "diskio.h"
#include "globals.h"
/* Port controls (Platform dependent) */ /* Port controls (Platform dependent) */
@ -113,17 +113,23 @@ void power_on (void)
DDRB |= _BV(MOSI) | _BV(SCK) | _BV(CSN); DDRB |= _BV(MOSI) | _BV(SCK) | _BV(CSN);
PORTB |= _BV(MOSI) | _BV(SCK); PORTB |= _BV(MOSI) | _BV(SCK);
#if defined(SPI_8_MHZ)
/* Enables SPI, selects "master", clock rate FCK / 2, and SPI mode 0 */ /* Enables SPI, selects "master", clock rate FCK / 2, and SPI mode 0 */
// SPI 8Mhz // SPI 8Mhz
/*
SPCR = _BV(SPE) | _BV(MSTR); SPCR = _BV(SPE) | _BV(MSTR);
SPSR = _BV(SPI2X); SPSR = _BV(SPI2X); //FCK / 2 - 8Mhz
*/ #elif defined (SPI_4_MHZ)
/* Enables SPI, selects "master", clock rate FCK / 4, and SPI mode 0 */ /* Enables SPI, selects "master", clock rate FCK / 4, and SPI mode 0 */
// SPI 4Mhz // SPI 4Mhz
SPCR = _BV(SPE) | _BV(MSTR); SPCR = _BV(SPE) | _BV(MSTR);
SPSR = 0x0; SPSR = 0x0; //FCK / 4 - 4Mhz
#else
/* Enables SPI, selects "master", clock rate FCK / 4, and SPI mode 0 */
// SPI 4Mhz
SPCR = _BV(SPE) | _BV(MSTR);
SPSR = 0x0; //FCK / 4 - 4Mhz
#endif
} }

4
03_m1284p_WIZNET_loopback_FATFS_template/globals.h
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@ -38,6 +38,10 @@ static FATFS Fatfs; //File system object for each logical drive. >= 2
//#define IP_WORK //#define IP_WORK
//SPI CLOCK 4 or 8Mhz
#define SPI_4_MHZ
//#define SPI_8_MHZ
extern unsigned long millis(void); extern unsigned long millis(void);
extern int freeRam (void); extern int freeRam (void);

19
03_m1284p_WIZNET_loopback_FATFS_template/mmc_avr.c
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@ -19,7 +19,7 @@
#include <avr/io.h> #include <avr/io.h>
#include "diskio.h" #include "diskio.h"
#include "globals.h"
/* Port controls (Platform dependent) */ /* Port controls (Platform dependent) */
@ -113,17 +113,24 @@ void power_on (void)
DDRB |= _BV(MOSI) | _BV(SCK) | _BV(CSN); DDRB |= _BV(MOSI) | _BV(SCK) | _BV(CSN);
PORTB |= _BV(MOSI) | _BV(SCK); PORTB |= _BV(MOSI) | _BV(SCK);
#if defined(SPI_8_MHZ)
/* Enables SPI, selects "master", clock rate FCK / 2, and SPI mode 0 */ /* Enables SPI, selects "master", clock rate FCK / 2, and SPI mode 0 */
// SPI 8Mhz // SPI 8Mhz
/*
SPCR = _BV(SPE) | _BV(MSTR); SPCR = _BV(SPE) | _BV(MSTR);
SPSR = _BV(SPI2X); SPSR = _BV(SPI2X); //FCK / 2 - 8Mhz
*/ #elif defined (SPI_4_MHZ)
/* Enables SPI, selects "master", clock rate FCK / 4, and SPI mode 0 */ /* Enables SPI, selects "master", clock rate FCK / 4, and SPI mode 0 */
// SPI 4Mhz // SPI 4Mhz
SPCR = _BV(SPE) | _BV(MSTR); SPCR = _BV(SPE) | _BV(MSTR);
SPSR = 0x0; SPSR = 0x0; //FCK / 4 - 4Mhz
#else
/* Enables SPI, selects "master", clock rate FCK / 4, and SPI mode 0 */
// SPI 4Mhz
SPCR = _BV(SPE) | _BV(MSTR);
SPSR = 0x0; //FCK / 4 - 4Mhz
#endif
} }
static static

11
03_m1284p_WIZNET_loopback_FATFS_template/spi.c
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@ -30,6 +30,8 @@
#include <avr/io.h> #include <avr/io.h>
#include "spi.h" #include "spi.h"
#include "globals.h"
//#include "contiki-conf.h" //#include "contiki-conf.h"
/* /*
@ -77,8 +79,13 @@ spi_init(void)
/* Enables SPI, selects "master", clock rate FCK / 4 - 4Mhz, and SPI mode 0 */ /* Enables SPI, selects "master", clock rate FCK / 4 - 4Mhz, and SPI mode 0 */
SPCR = _BV(SPE) | _BV(MSTR); SPCR = _BV(SPE) | _BV(MSTR);
SPSR = 0x0; #if defined(SPI_8_MHZ)
//SPSR = _BV(SPI2X); //FCK / 2 - 8Mhz SPSR = _BV(SPI2X); //FCK / 2 - 8Mhz
#elif defined (SPI_4_MHZ)
SPSR = 0x0; //FCK / 4 - 4Mhz
#else
SPSR = 0x0; //FCK / 4 - 4Mhz
#endif
} }

4
03_m1284p_WIZNET_loopback_STATIC_IP/globals.h
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@ -41,6 +41,10 @@ static FATFS Fatfs; //File system object for each logical drive. >= 2
#define IP_WORK #define IP_WORK
//SPI CLOCK 4 or 8Mhz
#define SPI_4_MHZ
//#define SPI_8_MHZ
extern unsigned long millis(void); extern unsigned long millis(void);
extern int freeRam (void); extern int freeRam (void);

10
03_m1284p_WIZNET_loopback_STATIC_IP/spi.c
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@ -30,6 +30,8 @@
#include <avr/io.h> #include <avr/io.h>
#include "spi.h" #include "spi.h"
#include "globals.h"
//#include "contiki-conf.h" //#include "contiki-conf.h"
/* /*
@ -77,7 +79,13 @@ spi_init(void)
/* Enables SPI, selects "master", clock rate FCK / 4 - 4Mhz, and SPI mode 0 */ /* Enables SPI, selects "master", clock rate FCK / 4 - 4Mhz, and SPI mode 0 */
SPCR = _BV(SPE) | _BV(MSTR); SPCR = _BV(SPE) | _BV(MSTR);
//SPSR = _BV(SPI2X); //FCK / 2 - 8Mhz #if defined(SPI_8_MHZ)
SPSR = _BV(SPI2X); //FCK / 2 - 8Mhz
#elif defined (SPI_4_MHZ)
SPSR = 0x0; //FCK / 4 - 4Mhz
#else
SPSR = 0x0; //FCK / 4 - 4Mhz
#endif
} }