ejung/parafraktor-stm32
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wip on dma config

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This commit is contained in:
Eggert Jung
2025-04-26 16:39:50 +02:00
parent 9aa8651f59
commit e7c793c88e
1 changed files with 63 additions and 13 deletions
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76
Src/main.c
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@@ -62,27 +62,61 @@ static void MX_GPIO_Init(void);
uint8_t rxBuffer[BUFFER_SIZE];
uint16_t rxBufferPos = 0;
void init_UART1(){
void init_UART1_it(){
RCC->APBENR2 |= RCC_APBENR2_USART1EN;
RCC->IOPENR |= RCC_IOPENR_GPIOCEN;
GPIOC->MODER &= ~GPIO_MODER_MODE5; // Alternate function mode on RX pin
GPIOC->MODER |= GPIO_MODER_MODE5_1;
GPIOC->AFR[0] &= GPIO_AFRL_AFSEL5;
GPIOC->AFR[0] |= 1 << GPIO_AFRL_AFSEL5_Pos;
GPIOC->AFR[0] |= 1 << GPIO_AFRL_AFSEL5_Pos; // AF1 -> USART1 RX
USART1->BRR = 128; // 32000000÷250000
USART1->CR1 = USART_CR1_RE;
USART1->CR3 |= USART_CR3_EIE;
USART1->CR1 |= USART_CR1_RXNEIE_RXFNEIE;
USART1->CR3 |= USART_CR3_EIE; // Interrupt on BREAK (and other errors)
USART1->CR1 |= USART_CR1_RXNEIE_RXFNEIE; // RX Interrupt
USART1->CR1 |= USART_CR1_UE;
HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(USART1_IRQn);
}
/* USER CODE END 0 */
void init_UART1_dma(){
RCC->IOPENR |= RCC_IOPENR_GPIOCEN;
RCC->APBENR2 |= RCC_APBENR2_USART1EN;
RCC->AHBENR |= RCC_AHBENR_DMA1EN;
GPIOC->MODER &= ~GPIO_MODER_MODE5; // Alternate function mode on RX pin
GPIOC->MODER |= GPIO_MODER_MODE5_1;
GPIOC->AFR[0] &= GPIO_AFRL_AFSEL5;
GPIOC->AFR[0] |= 1 << GPIO_AFRL_AFSEL5_Pos; // AF1 -> USART1 RX
USART1->BRR = 128; // 32000000÷250000
USART1->CR1 = USART_CR1_RE;
USART1->CR3 |= USART_CR3_EIE; // Interrupt on BREAK (and other errors)
USART1->CR3 |= USART_CR3_DMAR; // DMA Receiver mode
DMA1_Channel1->CCR = (0x02 << DMA_CCR_PL_Pos) | DMA_CCR_MINC | DMA_CCR_TCIE;
DMA1_Channel1->CMAR = ( uint32_t )&rxBuffer[0];
DMA1_Channel1->CPAR = ( uint32_t )&(USART1->RDR);
DMA1_Channel1->CNDTR = 5;
DMAMUX1_Channel0->CCR &= ~( DMAMUX_CxCR_DMAREQ_ID );
DMAMUX1_Channel0->CCR |= ( 50 << DMAMUX_CxCR_DMAREQ_ID_Pos ); // 50 -> USART1 RX
USART1->CR1 |= USART_CR1_UE;
HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(USART1_IRQn);
HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
}
void USART1_IRQHandler(){
if(USART1->ISR & USART_ISR_RXNE_RXFNE){
@@ -95,16 +129,18 @@ void USART1_IRQHandler(){
if(USART1->ISR & USART_ISR_FE){
USART1->ICR = USART_ICR_FECF;
printf("FE after %d\n",rxBufferPos);
rxBufferPos = 0;
printf("buf: ");
for(uint16_t i=0; i<10; i++)
printf("0x%02X ", rxBuffer[i]);
printf("\n");
//if(rxBufferPos != 514)
// printf("FE after %d\n",rxBufferPos);
//rxBufferPos = 0;
printf("FE\n");
//DMA1_Channel1->CNDTR = 1;
DMA1_Channel1->CNDTR = 5;
DMA1_Channel1->CCR |= ( DMA_CCR_EN );
//DMA1_Channel1->CCR |= ( DMA_CCR_EN );
}
if(USART1->ISR & USART_ISR_ORE){
USART1->ICR = USART_ICR_ORECF;
printf("ORE\n");
//printf("ORE\n");
}
if(USART1->ISR & USART_ISR_NE){
USART1->ICR = USART_ICR_NECF;
@@ -116,6 +152,15 @@ void USART1_IRQHandler(){
}
}
void DMA1_Channel1_IRQHandler(){
if(DMA1->ISR & DMA_ISR_TCIF1){
DMA1->IFCR = DMA_IFCR_CTCIF1;
DMA1_Channel1->CCR &= ~( DMA_CCR_EN );
DMA1_Channel1->CMAR = ( uint32_t )&rxBuffer[0];
}
}
/* USER CODE END 0 */
/**
* @brief The application entry point.
* @retval int
@@ -146,7 +191,7 @@ int main(void)
/* Initialize all configured peripherals */
MX_GPIO_Init();
/* USER CODE BEGIN 2 */
init_UART1();
init_UART1_dma();
/* USER CODE END 2 */
/* Infinite loop */
@@ -154,6 +199,11 @@ int main(void)
//HAL_UART_Receive_DMA(&huart1, rxBuffer, BUFFER_SIZE);
while (1)
{
printf("buf: ");
for(uint16_t i=0; i<10; i++)
printf("0x%02X ", rxBuffer[i]);
printf("\n");
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */