Compare commits
1 Commits
dma
...
0ecf383e3b
| Author | SHA1 | Date | |
|---|---|---|---|
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0ecf383e3b |
3
.gitmodules
vendored
3
.gitmodules
vendored
@@ -1,6 +1,3 @@
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|||||||
[submodule "Drivers/RTT"]
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[submodule "Drivers/RTT"]
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path = Drivers/RTT
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path = Drivers/RTT
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url = https://github.com/SEGGERMicro/RTT.git
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url = https://github.com/SEGGERMicro/RTT.git
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[submodule "Drivers/SystemView"]
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path = Drivers/SystemView
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url = https://github.com/SEGGERMicro/SystemView.git
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Submodule Drivers/SystemView deleted from d8bbf3f6e7
9
Makefile
9
Makefile
@@ -1,5 +1,5 @@
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##########################################################################################################################
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##########################################################################################################################
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# File automatically-generated by tool: [projectgenerator] version: [4.2.0-B44] date: [Thu May 01 21:37:30 CEST 2025]
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# File automatically-generated by tool: [projectgenerator] version: [4.2.0-B44] date: [Fri Apr 25 22:56:53 CEST 2025]
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##########################################################################################################################
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##########################################################################################################################
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# ------------------------------------------------
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# ------------------------------------------------
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@@ -58,8 +58,6 @@ Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_exti.c \
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Drivers/RTT/RTT/SEGGER_RTT.c \
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Drivers/RTT/RTT/SEGGER_RTT.c \
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Drivers/RTT/RTT/SEGGER_RTT_printf.c \
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Drivers/RTT/RTT/SEGGER_RTT_printf.c \
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Drivers/RTT/Syscalls/SEGGER_RTT_Syscalls_GCC.c \
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Drivers/RTT/Syscalls/SEGGER_RTT_Syscalls_GCC.c \
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Drivers/SystemView/SYSVIEW/SEGGER_SYSVIEW.c \
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Drivers/SystemView/Sample/NoOS/Config/Cortex-M0/SEGGER_SYSVIEW_Config_NoOS_CM0.c\
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Src/system_stm32g0xx.c
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Src/system_stm32g0xx.c
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# ASM sources
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# ASM sources
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@@ -126,10 +124,7 @@ C_INCLUDES = \
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-IDrivers/CMSIS/Device/ST/STM32G0xx/Include \
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-IDrivers/CMSIS/Device/ST/STM32G0xx/Include \
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-IDrivers/CMSIS/Include \
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-IDrivers/CMSIS/Include \
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-IDrivers/RTT/Config \
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-IDrivers/RTT/Config \
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-IDrivers/RTT/RTT \
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-IDrivers/RTT/RTT
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-IDrivers/SystemView/Config \
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-IDrivers/SystemView/SEGGER \
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-IDrivers/SystemView/SYSVIEW
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# compile gcc flags
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# compile gcc flags
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@@ -65,50 +65,49 @@ ProjectManager.UAScriptAfterPath=
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ProjectManager.UAScriptBeforePath=
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ProjectManager.UAScriptBeforePath=
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ProjectManager.UnderRoot=false
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ProjectManager.UnderRoot=false
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ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_USART1_UART_Init-USART1-false-HAL-true
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ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_USART1_UART_Init-USART1-false-HAL-true
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RCC.ADCFreq_Value=64000000
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RCC.ADCFreq_Value=32000000
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RCC.AHBFreq_Value=64000000
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RCC.AHBFreq_Value=32000000
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RCC.APBFreq_Value=64000000
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RCC.APBFreq_Value=32000000
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RCC.APBTimFreq_Value=64000000
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RCC.APBTimFreq_Value=32000000
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RCC.CECFreq_Value=32786.88524590164
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RCC.CECFreq_Value=32786.88524590164
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RCC.CortexFreq_Value=64000000
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RCC.CortexFreq_Value=32000000
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RCC.EXTERNAL_CLOCK_VALUE=48000
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RCC.EXTERNAL_CLOCK_VALUE=48000
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RCC.FCLKCortexFreq_Value=64000000
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RCC.FCLKCortexFreq_Value=32000000
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RCC.FDCANFreq_Value=64000000
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RCC.FDCANFreq_Value=32000000
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RCC.FamilyName=M
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RCC.FamilyName=M
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RCC.HCLKFreq_Value=64000000
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RCC.HCLKFreq_Value=32000000
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RCC.HSE_VALUE=8000000
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RCC.HSE_VALUE=8000000
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RCC.HSI48_VALUE=48000000
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RCC.HSI48_VALUE=48000000
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RCC.HSI_VALUE=16000000
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RCC.HSI_VALUE=16000000
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RCC.I2C1Freq_Value=64000000
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RCC.I2C1Freq_Value=32000000
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RCC.I2C2Freq_Value=64000000
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RCC.I2C2Freq_Value=32000000
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RCC.I2S1Freq_Value=64000000
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RCC.I2S1Freq_Value=32000000
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RCC.I2S2Freq_Value=64000000
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RCC.I2S2Freq_Value=32000000
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RCC.IPParameters=ADCFreq_Value,AHBFreq_Value,APBFreq_Value,APBTimFreq_Value,CECFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2S1Freq_Value,I2S2Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LPUART2Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,MCO2PinFreq_Value,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSourceVirtual,PWRFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,TIM15Freq_Value,TIM1Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
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RCC.IPParameters=ADCFreq_Value,AHBFreq_Value,APBFreq_Value,APBTimFreq_Value,CECFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2S1Freq_Value,I2S2Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LPUART2Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,MCO2PinFreq_Value,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSourceVirtual,PWRFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,TIM15Freq_Value,TIM1Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
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RCC.LPTIM1Freq_Value=64000000
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RCC.LPTIM1Freq_Value=32000000
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RCC.LPTIM2Freq_Value=64000000
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RCC.LPTIM2Freq_Value=32000000
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RCC.LPUART1Freq_Value=64000000
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RCC.LPUART1Freq_Value=32000000
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RCC.LPUART2Freq_Value=64000000
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RCC.LPUART2Freq_Value=32000000
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RCC.LSCOPinFreq_Value=32000
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RCC.LSCOPinFreq_Value=32000
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RCC.LSE_VALUE=32768
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RCC.LSE_VALUE=32768
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RCC.LSI_VALUE=32000
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RCC.LSI_VALUE=32000
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RCC.MCO1PinFreq_Value=64000000
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RCC.MCO1PinFreq_Value=32000000
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RCC.MCO2PinFreq_Value=64000000
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RCC.MCO2PinFreq_Value=32000000
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RCC.PLLN=16
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RCC.PLLPoutputFreq_Value=32000000
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RCC.PLLPoutputFreq_Value=64000000
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RCC.PLLQoutputFreq_Value=32000000
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RCC.PLLQoutputFreq_Value=64000000
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RCC.PLLRCLKFreq_Value=32000000
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RCC.PLLRCLKFreq_Value=64000000
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RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
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RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
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RCC.PWRFreq_Value=64000000
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RCC.PWRFreq_Value=32000000
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RCC.SYSCLKFreq_VALUE=64000000
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RCC.SYSCLKFreq_VALUE=32000000
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RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
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RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
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RCC.TIM15Freq_Value=64000000
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RCC.TIM15Freq_Value=32000000
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RCC.TIM1Freq_Value=64000000
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RCC.TIM1Freq_Value=32000000
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RCC.USART1Freq_Value=64000000
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RCC.USART1Freq_Value=32000000
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RCC.USART2Freq_Value=64000000
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RCC.USART2Freq_Value=32000000
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RCC.USART3Freq_Value=64000000
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RCC.USART3Freq_Value=32000000
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RCC.USBFreq_Value=48000000
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RCC.USBFreq_Value=48000000
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RCC.VCOInputFreq_Value=8000000
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RCC.VCOInputFreq_Value=8000000
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RCC.VCOOutputFreq_Value=128000000
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RCC.VCOOutputFreq_Value=64000000
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VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
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VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
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VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
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VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
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VP_SYS_VS_Systick.Mode=SysTick
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VP_SYS_VS_Systick.Mode=SysTick
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25
README.md
Normal file
25
README.md
Normal file
@@ -0,0 +1,25 @@
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# Parrafraktor
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||||||
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| Channel | Function | Values | |
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| ------- | ------------ | --------- | ------------------------------ |
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| 1 + i | Tilt | | |
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| 2 + i | Tilt fine | | |
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| 3 + i | Endless Tilt | 000 - 005 | No function |
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| | | 006 - 126 | Forward Rotation fast -> slow |
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| | | 127 - 128 | Stop |
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| | | 129 - 255 | Backward Rotation slow -> fast |
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| 31 | Auto Mode | 000 - 004 | No function |
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| | | 005 - 010 | Go to Reference |
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| | | 015 - 020 | Classic Mode |
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## Hardware
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- BIGTREETECH Manta M8P
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- https://github.com/bigtreetech/Manta-M8P/tree/master/V1.0_V1.1/Hardware
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- https://github.com/bigtreetech/Manta-M8P
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- https://bttwiki.com/M8P.html#product-profile
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137
Src/main.c
137
Src/main.c
@@ -21,7 +21,6 @@
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/* Private includes ----------------------------------------------------------*/
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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/* USER CODE BEGIN Includes */
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#include "SEGGER_SYSVIEW.h"
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#include "SEGGER_RTT.h"
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#include "SEGGER_RTT.h"
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#include "stm32g0b1xx.h"
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#include "stm32g0b1xx.h"
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#include "stm32g0xx_hal_cortex.h"
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#include "stm32g0xx_hal_cortex.h"
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@@ -63,80 +62,30 @@ static void MX_GPIO_Init(void);
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uint8_t rxBuffer[BUFFER_SIZE];
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uint8_t rxBuffer[BUFFER_SIZE];
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uint16_t rxBufferPos = 0;
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uint16_t rxBufferPos = 0;
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void init_UART1_it(){
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void init_UART1(){
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RCC->APBENR2 |= RCC_APBENR2_USART1EN;
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RCC->APBENR2 |= RCC_APBENR2_USART1EN;
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RCC->IOPENR |= RCC_IOPENR_GPIOCEN;
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RCC->IOPENR |= RCC_IOPENR_GPIOCEN;
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GPIOC->MODER &= ~GPIO_MODER_MODE5; // Alternate function mode on RX pin
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GPIOC->MODER &= ~GPIO_MODER_MODE5; // Alternate function mode on RX pin
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GPIOC->MODER |= GPIO_MODER_MODE5_1;
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GPIOC->MODER |= GPIO_MODER_MODE5_1;
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GPIOC->AFR[0] &= GPIO_AFRL_AFSEL5;
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GPIOC->AFR[0] &= GPIO_AFRL_AFSEL5;
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GPIOC->AFR[0] |= 1 << GPIO_AFRL_AFSEL5_Pos; // AF1 -> USART1 RX
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GPIOC->AFR[0] |= 1 << GPIO_AFRL_AFSEL5_Pos;
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USART1->BRR = 128; // 32000000÷250000
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USART1->BRR = 128; // 32000000÷250000
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USART1->CR1 = USART_CR1_RE;
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USART1->CR1 = USART_CR1_RE;
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USART1->CR3 |= USART_CR3_EIE; // Interrupt on BREAK (and other errors)
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USART1->CR3 |= USART_CR3_EIE;
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USART1->CR1 |= USART_CR1_RXNEIE_RXFNEIE; // RX Interrupt
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USART1->CR1 |= USART_CR1_RXNEIE_RXFNEIE;
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USART1->CR1 |= USART_CR1_UE;
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USART1->CR1 |= USART_CR1_UE;
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HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
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HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
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HAL_NVIC_EnableIRQ(USART1_IRQn);
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HAL_NVIC_EnableIRQ(USART1_IRQn);
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}
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}
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/* USER CODE END 0 */
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void init_UART1_dma(){
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RCC->IOPENR |= RCC_IOPENR_GPIOCEN;
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RCC->APBENR2 |= RCC_APBENR2_USART1EN;
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RCC->AHBENR |= RCC_AHBENR_DMA1EN;
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GPIOC->MODER &= ~GPIO_MODER_MODE5; // Alternate function mode on RX pin
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GPIOC->MODER |= GPIO_MODER_MODE5_1;
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GPIOC->AFR[0] &= GPIO_AFRL_AFSEL5;
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GPIOC->AFR[0] |= 1 << GPIO_AFRL_AFSEL5_Pos; // AF1 -> USART1 RX
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USART1->BRR = 256; // 64000000÷250000
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USART1->CR1 = USART_CR1_RE;
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USART1->CR3 |= USART_CR3_EIE; // Interrupt on BREAK (and other errors)
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USART1->CR3 |= USART_CR3_DMAR; // DMA Receiver mode
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DMA1_Channel1->CCR = (0x02 << DMA_CCR_PL_Pos) | DMA_CCR_MINC | DMA_CCR_TCIE;
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DMA1_Channel1->CMAR = ( uint32_t )&rxBuffer[0];
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DMA1_Channel1->CPAR = ( uint32_t )&(USART1->RDR);
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DMA1_Channel1->CNDTR = 5;
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DMAMUX1_Channel0->CCR &= ~( DMAMUX_CxCR_DMAREQ_ID );
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DMAMUX1_Channel0->CCR |= ( 50 << DMAMUX_CxCR_DMAREQ_ID_Pos ); // 50 -> USART1 RX
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USART1->CR1 |= USART_CR1_UE;
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HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
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HAL_NVIC_EnableIRQ(USART1_IRQn);
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HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
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HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
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}
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void Reset_DMA(void) {
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// Disable the DMA channel
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DMA1_Channel1->CCR &= ~DMA_CCR_EN; // Disable DMA Channel 1
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// Clear the transfer complete flag
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DMA1->IFCR |= DMA_IFCR_CTCIF1; // Clear transfer complete flag for Channel 1
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||||||
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// Reconfigure the DMA
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DMA1_Channel1->CMAR = (uint32_t)rxBuffer; // Set memory address to the start of the buffer
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DMA1_Channel1->CNDTR = BUFFER_SIZE; // Set number of data items to transfer
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||||||
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||||||
// Enable the DMA channel again
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|
||||||
DMA1_Channel1->CCR |= DMA_CCR_EN; // Enable DMA Channel 1
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|
||||||
}
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||||||
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|
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void USART1_IRQHandler(){
|
void USART1_IRQHandler(){
|
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SEGGER_SYSVIEW_RecordEnterISR();
|
|
||||||
if(USART1->ISR & USART_ISR_RXNE_RXFNE){
|
if(USART1->ISR & USART_ISR_RXNE_RXFNE){
|
||||||
//SEGGER_SYSVIEW_PrintfHost("RXNE");
|
|
||||||
//printf("%x ", USART1->RDR);
|
//printf("%x ", USART1->RDR);
|
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rxBuffer[rxBufferPos++] = USART1->RDR;
|
rxBuffer[rxBufferPos++] = USART1->RDR;
|
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if(rxBufferPos >= BUFFER_SIZE){
|
if(rxBufferPos >= BUFFER_SIZE){
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||||||
@@ -145,24 +94,17 @@ void USART1_IRQHandler(){
|
|||||||
}
|
}
|
||||||
|
|
||||||
if(USART1->ISR & USART_ISR_FE){
|
if(USART1->ISR & USART_ISR_FE){
|
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//TODO read rx==0
|
|
||||||
USART1->ICR = USART_ICR_FECF;
|
USART1->ICR = USART_ICR_FECF;
|
||||||
//if(rxBufferPos != 514)
|
printf("FE after %d\n",rxBufferPos);
|
||||||
// printf("FE after %d\n",rxBufferPos);
|
rxBufferPos = 0;
|
||||||
//rxBufferPos = 0;
|
printf("buf: ");
|
||||||
//DMA1_Channel1->CNDTR = 1;
|
for(uint16_t i=0; i<10; i++)
|
||||||
SEGGER_SYSVIEW_PrintfHost("FE");
|
printf("0x%02X ", rxBuffer[i]);
|
||||||
Reset_DMA();
|
printf("\n");
|
||||||
//DMA1_Channel1->CCR &= ~( DMA_CCR_EN );
|
|
||||||
//DMA1_Channel1->CNDTR = 512;
|
|
||||||
//DMA1_Channel1->CMAR = ( uint32_t )&rxBuffer[0];
|
|
||||||
//DMA1_Channel1->CCR |= ( DMA_CCR_EN );
|
|
||||||
////DMA1_Channel1->CCR |= ( DMA_CCR_EN );
|
|
||||||
}
|
}
|
||||||
if(USART1->ISR & USART_ISR_ORE){
|
if(USART1->ISR & USART_ISR_ORE){
|
||||||
USART1->ICR = USART_ICR_ORECF;
|
USART1->ICR = USART_ICR_ORECF;
|
||||||
//printf("ORE\n");
|
printf("ORE\n");
|
||||||
//SEGGER_SYSVIEW_PrintfHost("ORE");
|
|
||||||
}
|
}
|
||||||
if(USART1->ISR & USART_ISR_NE){
|
if(USART1->ISR & USART_ISR_NE){
|
||||||
USART1->ICR = USART_ICR_NECF;
|
USART1->ICR = USART_ICR_NECF;
|
||||||
@@ -172,40 +114,8 @@ void USART1_IRQHandler(){
|
|||||||
USART1->ICR = USART_ICR_UDRCF;
|
USART1->ICR = USART_ICR_UDRCF;
|
||||||
printf("UDR\n");
|
printf("UDR\n");
|
||||||
}
|
}
|
||||||
SEGGER_SYSVIEW_RecordExitISR();
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void DMA1_Channel1_IRQHandler(){
|
|
||||||
SEGGER_SYSVIEW_RecordEnterISR();
|
|
||||||
if(DMA1->ISR & DMA_ISR_TCIF1){
|
|
||||||
DMA1->IFCR = DMA_IFCR_CTCIF1;
|
|
||||||
}
|
|
||||||
SEGGER_SYSVIEW_PrintfHost("DMA");
|
|
||||||
SEGGER_SYSVIEW_RecordExitISR();
|
|
||||||
}
|
|
||||||
|
|
||||||
void init_stepper(){
|
|
||||||
RCC->IOPENR |= RCC_IOPENR_GPIOBEN;
|
|
||||||
RCC->IOPENR |= RCC_IOPENR_GPIOCEN;
|
|
||||||
RCC->IOPENR |= RCC_IOPENR_GPIOEEN;
|
|
||||||
|
|
||||||
// Set to output (00: Input, 01: Output, 10: Alternate function, 11: Analog)
|
|
||||||
// PB4 Direction
|
|
||||||
GPIOB->MODER &= ~(0x3 << (4 * 2)); // Clear mode bits for PB4
|
|
||||||
GPIOB->MODER |= (0x1 << (4 * 2)); // Set mode to output for PB4
|
|
||||||
|
|
||||||
// PC11 Enable
|
|
||||||
GPIOC->MODER &= ~(0x3 << (11 * 2)); // Clear mode bits for PC11
|
|
||||||
GPIOC->MODER |= (0x1 << (11 * 2)); // Set mode to output for PC11
|
|
||||||
|
|
||||||
// PE2 Step
|
|
||||||
GPIOE->MODER &= ~(0x3 << (2 * 2)); // Clear mode bits for PE2
|
|
||||||
GPIOE->MODER |= (0x1 << (2 * 2)); // Set mode to output for PE2
|
|
||||||
|
|
||||||
GPIOC->BSRR |= GPIO_BSRR_BS11;
|
|
||||||
}
|
|
||||||
/* USER CODE END 0 */
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief The application entry point.
|
* @brief The application entry point.
|
||||||
* @retval int
|
* @retval int
|
||||||
@@ -213,6 +123,8 @@ void init_stepper(){
|
|||||||
int main(void)
|
int main(void)
|
||||||
{
|
{
|
||||||
/* USER CODE BEGIN 1 */
|
/* USER CODE BEGIN 1 */
|
||||||
|
SEGGER_RTT_ConfigUpBuffer(0, NULL, NULL, 0, SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL);
|
||||||
|
printf("Moin!\n");
|
||||||
/* USER CODE END 1 */
|
/* USER CODE END 1 */
|
||||||
|
|
||||||
/* MCU Configuration--------------------------------------------------------*/
|
/* MCU Configuration--------------------------------------------------------*/
|
||||||
@@ -228,35 +140,20 @@ int main(void)
|
|||||||
SystemClock_Config();
|
SystemClock_Config();
|
||||||
|
|
||||||
/* USER CODE BEGIN SysInit */
|
/* USER CODE BEGIN SysInit */
|
||||||
SEGGER_RTT_ConfigUpBuffer(0, NULL, NULL, 0, SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL);
|
|
||||||
printf("Moin!\n");
|
|
||||||
|
|
||||||
SEGGER_SYSVIEW_Conf(); /* Configure and initialize SystemView */
|
|
||||||
|
|
||||||
/* USER CODE END SysInit */
|
/* USER CODE END SysInit */
|
||||||
|
|
||||||
/* Initialize all configured peripherals */
|
/* Initialize all configured peripherals */
|
||||||
MX_GPIO_Init();
|
MX_GPIO_Init();
|
||||||
/* USER CODE BEGIN 2 */
|
/* USER CODE BEGIN 2 */
|
||||||
init_UART1_dma();
|
init_UART1();
|
||||||
init_stepper();
|
|
||||||
/* USER CODE END 2 */
|
/* USER CODE END 2 */
|
||||||
|
|
||||||
/* Infinite loop */
|
/* Infinite loop */
|
||||||
/* USER CODE BEGIN WHILE */
|
/* USER CODE BEGIN WHILE */
|
||||||
//HAL_UART_Receive_DMA(&huart1, rxBuffer, BUFFER_SIZE);
|
//HAL_UART_Receive_DMA(&huart1, rxBuffer, BUFFER_SIZE);
|
||||||
uint16_t cnt = 0;
|
|
||||||
while (1)
|
while (1)
|
||||||
{
|
{
|
||||||
printf("buf: ");
|
|
||||||
for(uint16_t i=0; i<10; i++)
|
|
||||||
printf("0x%02X ", rxBuffer[i]);
|
|
||||||
printf("\n");
|
|
||||||
SEGGER_SYSVIEW_OnIdle();
|
|
||||||
if(cnt++ >= 260-rxBuffer[1]){
|
|
||||||
cnt = 0;
|
|
||||||
GPIOE->ODR ^= GPIO_ODR_OD2;
|
|
||||||
}
|
|
||||||
/* USER CODE END WHILE */
|
/* USER CODE END WHILE */
|
||||||
|
|
||||||
/* USER CODE BEGIN 3 */
|
/* USER CODE BEGIN 3 */
|
||||||
@@ -285,7 +182,7 @@ void SystemClock_Config(void)
|
|||||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||||
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
|
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
|
||||||
RCC_OscInitStruct.PLL.PLLN = 16;
|
RCC_OscInitStruct.PLL.PLLN = 8;
|
||||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
||||||
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
|
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
|
||||||
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
|
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
|
||||||
@@ -302,7 +199,7 @@ void SystemClock_Config(void)
|
|||||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
|
||||||
|
|
||||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
|
||||||
{
|
{
|
||||||
Error_Handler();
|
Error_Handler();
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -23,7 +23,6 @@
|
|||||||
/* Private includes ----------------------------------------------------------*/
|
/* Private includes ----------------------------------------------------------*/
|
||||||
/* USER CODE BEGIN Includes */
|
/* USER CODE BEGIN Includes */
|
||||||
#include "stdio.h"
|
#include "stdio.h"
|
||||||
#include "SEGGER_SYSVIEW.h"
|
|
||||||
/* USER CODE END Includes */
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
/* Private typedef -----------------------------------------------------------*/
|
/* Private typedef -----------------------------------------------------------*/
|
||||||
@@ -43,6 +42,7 @@
|
|||||||
|
|
||||||
/* Private variables ---------------------------------------------------------*/
|
/* Private variables ---------------------------------------------------------*/
|
||||||
/* USER CODE BEGIN PV */
|
/* USER CODE BEGIN PV */
|
||||||
|
|
||||||
/* USER CODE END PV */
|
/* USER CODE END PV */
|
||||||
|
|
||||||
/* Private function prototypes -----------------------------------------------*/
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
@@ -126,12 +126,11 @@ void PendSV_Handler(void)
|
|||||||
void SysTick_Handler(void)
|
void SysTick_Handler(void)
|
||||||
{
|
{
|
||||||
/* USER CODE BEGIN SysTick_IRQn 0 */
|
/* USER CODE BEGIN SysTick_IRQn 0 */
|
||||||
SEGGER_SYSVIEW_TickCnt++;
|
|
||||||
SEGGER_SYSVIEW_RecordEnterISR();
|
|
||||||
/* USER CODE END SysTick_IRQn 0 */
|
/* USER CODE END SysTick_IRQn 0 */
|
||||||
HAL_IncTick();
|
HAL_IncTick();
|
||||||
/* USER CODE BEGIN SysTick_IRQn 1 */
|
/* USER CODE BEGIN SysTick_IRQn 1 */
|
||||||
SEGGER_SYSVIEW_RecordExitISR();
|
|
||||||
/* USER CODE END SysTick_IRQn 1 */
|
/* USER CODE END SysTick_IRQn 1 */
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -9,9 +9,6 @@
|
|||||||
-IDrivers/CMSIS/Include
|
-IDrivers/CMSIS/Include
|
||||||
-IDrivers/RTT/Config
|
-IDrivers/RTT/Config
|
||||||
-IDrivers/RTT/RTT
|
-IDrivers/RTT/RTT
|
||||||
-IDrivers/SystemView/Config
|
|
||||||
-IDrivers/SystemView/SEGGER
|
|
||||||
-IDrivers/SystemView/SYSVIEW
|
|
||||||
-Og
|
-Og
|
||||||
-Wall
|
-Wall
|
||||||
-fdata-sections
|
-fdata-sections
|
||||||
|
|||||||
257
docs/schematic.drawio
Normal file
257
docs/schematic.drawio
Normal file
@@ -0,0 +1,257 @@
|
|||||||
|
<mxfile host="Electron" modified="2025-04-28T12:33:33.866Z" agent="Mozilla/5.0 (Macintosh; Intel Mac OS X 10_15_7) AppleWebKit/537.36 (KHTML, like Gecko) draw.io/22.1.2 Chrome/114.0.5735.289 Electron/25.9.4 Safari/537.36" etag="EI7Aw-TNnqPbeWTsstNB" version="22.1.2" type="device">
|
||||||
|
<diagram name="Seite-1" id="_rB38n3-t7QUQ63QpIv4">
|
||||||
|
<mxGraphModel dx="754" dy="441" grid="1" gridSize="10" guides="1" tooltips="1" connect="1" arrows="1" fold="1" page="1" pageScale="1" pageWidth="583" pageHeight="827" math="0" shadow="0">
|
||||||
|
<root>
|
||||||
|
<mxCell id="0" />
|
||||||
|
<mxCell id="1" parent="0" />
|
||||||
|
<mxCell id="9vde1n3-oVz1CaPuqj4n-1" value="" style="whiteSpace=wrap;html=1;aspect=fixed;" parent="1" vertex="1">
|
||||||
|
<mxGeometry x="120" y="200" width="80" height="80" as="geometry" />
|
||||||
|
</mxCell>
|
||||||
|
<mxCell id="9vde1n3-oVz1CaPuqj4n-2" value="" style="whiteSpace=wrap;html=1;aspect=fixed;" parent="1" vertex="1">
|
||||||
|
<mxGeometry x="230" y="200" width="80" height="80" as="geometry" />
|
||||||
|
</mxCell>
|
||||||
|
<mxCell id="9vde1n3-oVz1CaPuqj4n-3" value="" style="whiteSpace=wrap;html=1;aspect=fixed;" parent="1" vertex="1">
|
||||||
|
<mxGeometry x="340" y="200" width="80" height="80" as="geometry" />
|
||||||
|
</mxCell>
|
||||||
|
<mxCell id="9vde1n3-oVz1CaPuqj4n-4" value="Mantis" style="rounded=0;whiteSpace=wrap;html=1;" parent="1" vertex="1">
|
||||||
|
<mxGeometry x="120" y="160" width="80" height="20" as="geometry" />
|
||||||
|
</mxCell>
|
||||||
|
<mxCell id="9vde1n3-oVz1CaPuqj4n-5" value="Mantis" style="rounded=0;whiteSpace=wrap;html=1;" parent="1" vertex="1">
|
||||||
|
<mxGeometry x="120" y="300" width="80" height="20" as="geometry" />
|
||||||
|
</mxCell>
|
||||||
|
<mxCell id="9vde1n3-oVz1CaPuqj4n-6" value="Mantis" style="rounded=0;whiteSpace=wrap;html=1;" parent="1" vertex="1">
|
||||||
|
<mxGeometry x="230" y="160" width="80" height="20" as="geometry" />
|
||||||
|
</mxCell>
|
||||||
|
<mxCell id="9vde1n3-oVz1CaPuqj4n-7" value="Mantis" style="rounded=0;whiteSpace=wrap;html=1;" parent="1" vertex="1">
|
||||||
|
<mxGeometry x="230" y="300" width="80" height="20" as="geometry" />
|
||||||
|
</mxCell>
|
||||||
|
<mxCell id="9vde1n3-oVz1CaPuqj4n-8" value="Mantis" style="rounded=0;whiteSpace=wrap;html=1;" parent="1" vertex="1">
|
||||||
|
<mxGeometry x="340" y="160" width="80" height="20" as="geometry" />
|
||||||
|
</mxCell>
|
||||||
|
<mxCell id="9vde1n3-oVz1CaPuqj4n-9" value="Mantis" style="rounded=0;whiteSpace=wrap;html=1;" parent="1" vertex="1">
|
||||||
|
<mxGeometry x="340" y="300" width="80" height="20" as="geometry" />
|
||||||
|
</mxCell>
|
||||||
|
<mxCell id="9vde1n3-oVz1CaPuqj4n-15" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=0;exitY=0.5;exitDx=0;exitDy=0;entryX=0.5;entryY=1;entryDx=0;entryDy=0;" parent="1" source="9vde1n3-oVz1CaPuqj4n-10" target="9vde1n3-oVz1CaPuqj4n-7" edge="1">
|
||||||
|
<mxGeometry relative="1" as="geometry" />
|
||||||
|
</mxCell>
|
||||||
|
<mxCell id="9vde1n3-oVz1CaPuqj4n-16" value="DMX" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=0;exitY=0.5;exitDx=0;exitDy=0;entryX=0.5;entryY=1;entryDx=0;entryDy=0;" parent="1" source="9vde1n3-oVz1CaPuqj4n-10" target="9vde1n3-oVz1CaPuqj4n-9" edge="1">
|
||||||
|
<mxGeometry x="0.0833" y="-10" relative="1" as="geometry">
|
||||||
|
<mxPoint as="offset" />
|
||||||
|
</mxGeometry>
|
||||||
|
</mxCell>
|
||||||
|
<mxCell id="9vde1n3-oVz1CaPuqj4n-17" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=0;exitY=0.5;exitDx=0;exitDy=0;entryX=0.5;entryY=1;entryDx=0;entryDy=0;" parent="1" source="9vde1n3-oVz1CaPuqj4n-10" target="9vde1n3-oVz1CaPuqj4n-5" edge="1">
|
||||||
|
<mxGeometry relative="1" as="geometry" />
|
||||||
|
</mxCell>
|
||||||
|
<mxCell id="9vde1n3-oVz1CaPuqj4n-10" value="PI CM4" style="whiteSpace=wrap;html=1;" parent="1" vertex="1">
|
||||||
|
<mxGeometry x="120" y="120" width="50" height="40" as="geometry" />
|
||||||
|
</mxCell>
|
||||||
|
<mxCell id="9vde1n3-oVz1CaPuqj4n-12" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;entryX=0.5;entryY=0;entryDx=0;entryDy=0;" parent="1" source="9vde1n3-oVz1CaPuqj4n-10" target="9vde1n3-oVz1CaPuqj4n-6" edge="1">
|
||||||
|
<mxGeometry relative="1" as="geometry" />
|
||||||
|
</mxCell>
|
||||||
|
<mxCell id="9vde1n3-oVz1CaPuqj4n-13" value="DMX" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;entryX=0.5;entryY=0;entryDx=0;entryDy=0;" parent="1" source="9vde1n3-oVz1CaPuqj4n-10" target="9vde1n3-oVz1CaPuqj4n-8" edge="1">
|
||||||
|
<mxGeometry x="-0.5873" y="10" relative="1" as="geometry">
|
||||||
|
<mxPoint as="offset" />
|
||||||
|
</mxGeometry>
|
||||||
|
</mxCell>
|
||||||
|
<mxCell id="pmsy6Yo1mVgsH6J7jIt1-5" value="" style="group" parent="1" vertex="1" connectable="0">
|
||||||
|
<mxGeometry x="120" y="180" width="79.8195238095239" height="20" as="geometry" />
|
||||||
|
</mxCell>
|
||||||
|
<mxCell id="9vde1n3-oVz1CaPuqj4n-21" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;entryX=0.5;entryY=0;entryDx=0;entryDy=0;fillColor=#f8cecc;strokeColor=#b85450;" parent="pmsy6Yo1mVgsH6J7jIt1-5" edge="1">
|
||||||
|
<mxGeometry relative="1" as="geometry">
|
||||||
|
<mxPoint x="0.009523809523898308" as="sourcePoint" />
|
||||||
|
<mxPoint y="20" as="targetPoint" />
|
||||||
|
</mxGeometry>
|
||||||
|
</mxCell>
|
||||||
|
<mxCell id="pmsy6Yo1mVgsH6J7jIt1-1" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;entryX=0.5;entryY=0;entryDx=0;entryDy=0;fillColor=#f8cecc;strokeColor=#b85450;" parent="pmsy6Yo1mVgsH6J7jIt1-5" edge="1">
|
||||||
|
<mxGeometry relative="1" as="geometry">
|
||||||
|
<mxPoint x="20.0095238095239" as="sourcePoint" />
|
||||||
|
<mxPoint x="20" y="20" as="targetPoint" />
|
||||||
|
</mxGeometry>
|
||||||
|
</mxCell>
|
||||||
|
<mxCell id="pmsy6Yo1mVgsH6J7jIt1-2" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;entryX=0.5;entryY=0;entryDx=0;entryDy=0;fillColor=#f8cecc;strokeColor=#b85450;" parent="pmsy6Yo1mVgsH6J7jIt1-5" edge="1">
|
||||||
|
<mxGeometry relative="1" as="geometry">
|
||||||
|
<mxPoint x="39.909523809523904" as="sourcePoint" />
|
||||||
|
<mxPoint x="39.900000000000006" y="20" as="targetPoint" />
|
||||||
|
</mxGeometry>
|
||||||
|
</mxCell>
|
||||||
|
<mxCell id="pmsy6Yo1mVgsH6J7jIt1-3" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;entryX=0.5;entryY=0;entryDx=0;entryDy=0;fillColor=#f8cecc;strokeColor=#b85450;" parent="pmsy6Yo1mVgsH6J7jIt1-5" edge="1">
|
||||||
|
<mxGeometry relative="1" as="geometry">
|
||||||
|
<mxPoint x="60.0095238095239" as="sourcePoint" />
|
||||||
|
<mxPoint x="60" y="20" as="targetPoint" />
|
||||||
|
</mxGeometry>
|
||||||
|
</mxCell>
|
||||||
|
<mxCell id="pmsy6Yo1mVgsH6J7jIt1-4" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;entryX=0.5;entryY=0;entryDx=0;entryDy=0;fillColor=#f8cecc;strokeColor=#b85450;" parent="pmsy6Yo1mVgsH6J7jIt1-5" edge="1">
|
||||||
|
<mxGeometry relative="1" as="geometry">
|
||||||
|
<mxPoint x="79.8195238095239" as="sourcePoint" />
|
||||||
|
<mxPoint x="79.81" y="20" as="targetPoint" />
|
||||||
|
</mxGeometry>
|
||||||
|
</mxCell>
|
||||||
|
<mxCell id="pmsy6Yo1mVgsH6J7jIt1-12" value="" style="group" parent="1" vertex="1" connectable="0">
|
||||||
|
<mxGeometry x="230" y="180" width="79.8195238095239" height="20" as="geometry" />
|
||||||
|
</mxCell>
|
||||||
|
<mxCell id="pmsy6Yo1mVgsH6J7jIt1-13" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;entryX=0.5;entryY=0;entryDx=0;entryDy=0;fillColor=#f8cecc;strokeColor=#b85450;" parent="pmsy6Yo1mVgsH6J7jIt1-12" edge="1">
|
||||||
|
<mxGeometry relative="1" as="geometry">
|
||||||
|
<mxPoint x="0.009523809523898308" as="sourcePoint" />
|
||||||
|
<mxPoint y="20" as="targetPoint" />
|
||||||
|
</mxGeometry>
|
||||||
|
</mxCell>
|
||||||
|
<mxCell id="pmsy6Yo1mVgsH6J7jIt1-14" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;entryX=0.5;entryY=0;entryDx=0;entryDy=0;fillColor=#f8cecc;strokeColor=#b85450;" parent="pmsy6Yo1mVgsH6J7jIt1-12" edge="1">
|
||||||
|
<mxGeometry relative="1" as="geometry">
|
||||||
|
<mxPoint x="20.0095238095239" as="sourcePoint" />
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||||||
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|
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|
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BIN
docs/schematic.png
Normal file
BIN
docs/schematic.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 58 KiB |
Reference in New Issue
Block a user