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Kai-Bjoern
2020-04-16 16:52:36 +02:00
parent 97e1e226f3
commit ff72483525
2019 changed files with 824245 additions and 3 deletions
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392
src/Modules/MMU/mmu.c Normal file
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/*
****************************************************************************************************
*
* uC/OS-MMU
*
* (c) Copyright 2012, Micrium, FL
* All rights reserved.
*
* All rights reserved. Protected by international copyright laws.
* Knowledge of the source code may not be used to write a similar
* product. This file may only be used in accordance with a license
* and should not be redistributed in any way.
*
*
* Version : 3.1.2pp-35237
* File : MMU.c (#1)
* Programmer(s) : EO
****************************************************************************************************
*/
/*!
****************************************************************************************************
* \defgroup PAR_CPU_MMU Target Specific MMU Implementation
* \ingroup PAR_CORE
*
*
* The memory management unit (MMU) for the ...
*
****************************************************************************************************
*/
/*
****************************************************************************************************
* INCLUDES
****************************************************************************************************
*/
#include "mmu.h"
#include "xpseudo_asm.h"
#include "xil_cache.h"
#include "lib_mem.h"
#include "mmu_cfg.h"
/*
****************************************************************************************************
* GOBAL DATA
****************************************************************************************************
*/
extern INT32U MMUTable;
/*
****************************************************************************************************
* PRIVATE FUNCTION PROTOTYPES
****************************************************************************************************
*/
static MMU_ERR_T MMUTblAdd (PAR_MEM_REGION_REF_T mem, INT32U * pMMUTable);
static MMU_ERR_T MMUTblAdd1M (PAR_MEM_REGION_REF_T mem, INT32U off, INT32U * pMMUTable);
static void FTTSet (INT32U va, INT32U descr, INT32U * pMMUTable);
static INT32U FTTGet (INT32U va, INT32U * pMMUTable);
static INT32U FTTDescr (PAR_MEM_REGION_REF_T mem, INT32U offset, INT32U type, INT32U tbl);
static void MMUEnable (INT32U * pMMUTable);
static void MMUSwitchContext (INT32U id);
/*
****************************************************************************************************
* FUNCTIONS
****************************************************************************************************
*/
/*------------------------------------------------------------------------------------------------*/
/*!
* \brief INIT THE MMU
*
* \ingroup PAR_CPU_MMU
*
* This function initialize the target specific MMU
*
* \note The integrator must supply the contents of the PARErrLogging() function to handle
* possible error conditions.
*/
/*------------------------------------------------------------------------------------------------*/
MMU_ERR_T MMUInit (void)
{
INT32U n; /* Local: loop counter */
MMU_ERR_T err = MMU_ERR_NONE;
Mem_Clr(&MMUTable,FTT_SIZE * sizeof(CPU_WORD_SIZE_32));
for(n = 0; n < sizeof(PARMemTbl_Core)/sizeof(PAR_MEM_REGION_T); n++){
err = MMUTblAdd((PAR_MEM_REGION_REF_T)&PARMemTbl_Core[n], &MMUTable);
if(err != MMU_ERR_NONE)
return err;
}
MMUEnable(&MMUTable); /* Enable the MMU */
return MMU_ERR_NONE;
}
/*
****************************************************************************************************
* LOCAL FUNCTIONS
****************************************************************************************************
*/
/*------------------------------------------------------------------------------------------------*/
/*!
* \brief MMU TABLE CONSTRUCTION
*
* \ingroup PAR_CPU_MMU
*
* This function constructs the needed table entries for a single user defined memory
* region with the following rules:
*
* - build user memory size with blocks of 4K, 64K and 1M portions
*
* - ensure that each block is aligned at size (4K Block is aligned at 4K boundary, etc.)
*
* \param mem Reference to memory region
*
* \note Memory portions below 1KB will be ignored, because the MMU granularity starts with 1kB
*/
/*------------------------------------------------------------------------------------------------*/
static MMU_ERR_T MMUTblAdd(const PAR_MEM_REGION_REF_T mem, INT32U * pMMUTable)
{
INT32U vaddr; /* Local: virtual address */
INT32U off; /* Local: offset in memory region */
INT32U size; /* Local: remaining size of memory region */
MMU_ERR_T err = MMU_ERR_NONE;
/*------------------------------------------*/
vaddr = mem->VA_Start; /* set virtual memory address */
size = mem->Size; /* set size to memory region size */
off = 0; /* set memory region offset to 0 */
if ((vaddr & (MMU_SIZE_1MB - 1)) != 0) { /* see, if VA is not aligned at 4k */
return MMU_ERR_ALIGN;
}
if ((size % MMU_SIZE_1MB) != 0) { /* see, if size is not multiple of 4k */
return MMU_ERR_SIZE;
}
while(size >= MMU_SIZE_1MB) { /* create section for memory region */
err = MMUTblAdd1M(mem, off, pMMUTable); /* add a 1M section */
if(err != MMU_ERR_NONE)
return err;
vaddr += MMU_SIZE_1MB; /* update virtual address and */
off += MMU_SIZE_1MB; /* offset and */
size -= MMU_SIZE_1MB; /* remaining bytes in memory region */
}
return MMU_ERR_NONE;
}
/*------------------------------------------------------------------------------------------------*/
/*!
* \brief INSERT 1M SECTION IN MMU TABLE
*
* \ingroup PAR_CPU_MMU
*
* This function constructs the needed table entries for a single 1M memory block.
*
* \param mem Reference to memory region
*
* \param off Offset within the referenced memory region
*/
/*------------------------------------------------------------------------------------------------*/
static MMU_ERR_T MMUTblAdd1M(PAR_MEM_REGION_REF_T mem, INT32U off, INT32U * pMMUTable)
{
INT32U vaddr; /* Local: virtual address */
INT32U descr; /* Local: translation table descriptor */
INT32U type; /* Local: descriptor type information */
/*------------------------------------------*/
vaddr = mem->VA_Start + off; /* calculate virtual address */
type = FTTGet(vaddr, pMMUTable) & FTT_TYPE; /* get descriptor type */
if (type != FTT_TYPE_FLT) { /* see, if section is already in use */
return MMU_ERR_ENTRY_IN_USE;
}
descr = FTTDescr(mem, off, FTT_TYPE_SEC, 0); /* construct first level section descr. */
FTTSet(vaddr, descr, pMMUTable); /* set section for virtual address */
return MMU_ERR_NONE;
}
/*------------------------------------------------------------------------------------------------*/
/*!
* \brief SET FIRST LEVEL TRANSLATION TABLE DESCRIPTOR
*
* \ingroup PAR_CPU_MMU
*
* This function sets the given descriptor in the first level translation table
* which corresponds to the given virtual address.
*
* \param va Virtual Address
*
* \param descr First level descriptor
*/
/*------------------------------------------------------------------------------------------------*/
static void FTTSet(INT32U va, INT32U descr, INT32U * pMMUTable)
{
volatile INT32U *tbl; /* Local: ptr to first level table entry */
INT32U tbl_idx; /* Local: first level table index */
/*------------------------------------------*/
tbl_idx = (va >> 20) & 0x00000FFF; /* get table index out of virtual address */
tbl = pMMUTable + tbl_idx; /* set first level table base address */
/*------------------------------------------*/
*tbl = descr; /* set descriptor in first level table */
dsb();
isb();
}
/*------------------------------------------------------------------------------------------------*/
/*!
* \brief GET FIRST LEVEL TRANSLATION TABLE DESCRIPTOR
*
* \ingroup PAR_CPU_MMU
*
* This function returns the first level translation table descriptor of the given
* virtual address.
*
* \param va Virtual Address
*
* \return The current active descriptor is returned.
*/
/*------------------------------------------------------------------------------------------------*/
static INT32U FTTGet(INT32U va, INT32U * pMMUTable)
{
volatile INT32U *tbl; /* Local: ptr to first level table entry */
INT32U tbl_idx; /* Local: first level table index */
/*------------------------------------------*/
tbl_idx = (va >> 20) & 0x00000FFF; /* get table index out of virtual address */
tbl = pMMUTable + tbl_idx; /* set first level table base address */
/*------------------------------------------*/
return (*tbl); /* get descriptor in first level table */
}
/*------------------------------------------------------------------------------------------------*/
/*!
* \brief CONSTRUCT FIRST LEVEL TRANSLATION TABLE DESCRIPTOR
*
* \ingroup PAR_CPU_MMU
*
* This function constructs the first level translation table descriptor of the given
* type for the offset within the memory region.
*
* \param mem Reference to memory region
*
* \param offset Offset within the referenced memory region
*
* \param type Type information (section / coarse page / fine page / fault)
*
* \param base Base address of page table
*
* \return For the types FTT_TYPE_SEC, FTT_TYPE_CPT and FTT_TYPE_FPT, the
* corresponding table descriptor is returned. For any other type, the return value is
* the table descriptor for FTT_TYPE_FLT.
*
* \see FTT_TYPE_FLT, FTT_TYPE_CPT, FTT_TYPE_SEC, FTT_TYPE_FPT
*/
/*------------------------------------------------------------------------------------------------*/
static INT32U FTTDescr(PAR_MEM_REGION_REF_T mem, INT32U offset, INT32U type, INT32U base)
{
INT32U result = 0; /* Local: function result */
INT32U pa; /* Local: physical address */
switch(type){
case FTT_TYPE_SEC:
pa = mem->PA_Start + offset; /* yes: calculate physical address */
result = FTT_TYPE_SEC | /* set descriptor type to section */
((mem->HID & PAR_HID_CB_MASK) << 2u) | /* cachable & bufferable flag */
((mem->HID & PAR_HID_F_XN) >> 6u) | /* Execute-Never Flag */
((PAR_DOMAIN_MASTER) << 5) | /* owner = domain */
((mem->AP & 0x3) << 10u) | /* access permissions AP0 and AP1 */
((mem->AP & 0x4) << 13u) | /* access permissions AP2 */
((mem->HID & PAR_HID_TEX_MASK) << 10u) | /* TEX attributes */
((mem->HID & PAR_HID_F_S) << 8u) | /* shareable-flag */
((mem->HID & PAR_HID_F_NG) << 8u) | /* Non-Global-Flag */
((mem->HID & PAR_HID_F_NS) << 8u) | /* non-secure bit */
(pa & 0xFFF00000); /* bits[31:20] of physical address */
break;
case FTT_TYPE_PT:
case FTT_TYPE_FLT:
case FTT_TYPE_RES:
default:
break;
}
return result;
}
/*------------------------------------------------------------------------------------------------*/
/*!
* \brief ENABLE MMU
*
* \ingroup PAR_CPU_MMU
*
* This function enables the MMU.
*
* \note The first level translation table and the page tables must be initialized before
* calling this function.
*/
/*------------------------------------------------------------------------------------------------*/
static void MMUEnable(INT32U * pMMUTable)
{
INT32U ctrl; /* Local: control register */
//Invalidate data and instruction cache
Xil_DCacheDisable();
__set_mmu_table(((INT32U)pMMUTable & 0xFFFFC000) | PAR_TTBR0_FLAGS); /* Set first level transl. table base addr. */
__set_domain_control(0x55555555u); /* set all domains to client */
//eo verwenden noch PD1 = 1 für tlb miss in TTBR1 wird zu translation fault.
__set_asid(0 & 0xFF);
__set_mmu_control(0x00000000); /* Set TTBCR to 0 -> Use TTBR0 and 14Bit alignment */
__clr_mmu_fault();
__dsb();
__invalidate_tlb();
__invalidate_branchpred();
__dsb();
__isb();
ctrl = __get_sys_control(); /* get current control register */
ctrl |= MMU_SCTLR_FLAGS; /* set I,C,S and M to enable MMU */
__set_sys_control(ctrl); /* write new control register */
/*------------------------------------------*/
__no_operation(); /* perform 2 flat fetches */
__no_operation();
#if (UCOS_AMP_MASTER == DEF_ENABLED)
// /* Enable L2 Cache */
// This is a "mandatory" step, don't now why, see Zynq Reference manual
*((CPU_INT32U*)0xF8000A1C) = 0x020202;
Xil_L2CacheEnable();
/* set L2 Aux register */
// CPU_INT32U dat = *((CPU_INT32U*)0xF8F02104);
// dat = 0x72760000;
// *((CPU_INT32U*)0xF8F02104) = dat;
// // /* Set all latencies of tag-ram to 2 */
// // *((CPU_INT32U*)0xF8F02108) = 0x00000111;
// // /* set data ram write and setup latencies to 2, data ram read to 3 */
// // *((CPU_INT32U*)0xF8F0210C) = 0x00000121;
// // /* set prefetch conrtol register */
// // *((CPU_INT32U*)0xF8F02F60) = 0x30000000;
// /* enable L2 Cache */
// *((CPU_INT32U*)0xF8F02100) = 0x1;
#endif
CPU_INT32U actlr = __get_actlr();
actlr &= ~(0x00000040);
__set_actlr(actlr);
/*--- MMU/address translation is enabled ---*/
}
/*------------------------------------------------------------------------------------------------*/
/*!
* \brief Switch Address Space
*
* \ingroup PAR_CPU_MMU
*
* This function switches the address space and manipulates the virt->phys translation.
*
* \param id Partition ID
*/
/*------------------------------------------------------------------------------------------------*/
static void MMUSwitchContext(INT32U id)
{
CPU_INT32U cpu_sr = 0;
/*------------------------------------------*/
OS_ENTER_CRITICAL(); /* Enter critical section */
//We don't need to flush caches, when for all shared memory regions the L1 cache policy is correct write through or disabled
// __flush_caches(); /* Flush caches */
// MMU_DCacheClean();
//We don't need to invalidate the tlb, beacuase we have the ASID value corresponding to a partition
// __invalidate_tlb(); /* Invalidate TLB */
__dsb();
__set_asid(id & 0xFF);
__set_mmu_table(((INT32U)MMUTable & 0xFFFFC000) | PAR_TTBR0_FLAGS); /* Set first level transl. table base addr. */
__dsb();
__isb();
OS_EXIT_CRITICAL(); /* Exit critical section */
/*------------------------------------------*/
}

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src/Modules/MMU/mmu.h Normal file
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/*
****************************************************************************************************
*
* uC/OS-MMU
*
* (c) Copyright 2012, Micrium, FL
* All rights reserved.
*
* All rights reserved. Protected by international copyright laws.
* Knowledge of the source code may not be used to write a similar
* product. This file may only be used in accordance with a license
* and should not be redistributed in any way.
*
*
* Version : 3.1.2pp-35237
* File : par_mmu.h (#1)
* Programmer(s) : EO
****************************************************************************************************
*/
#ifndef _MMU_H_
#define _MMU_H_
/*
****************************************************************************************************
* INCLUDES
****************************************************************************************************
*/
#include "ucos_ii.h"
/*
****************************************************************************************************
* ERROR DEFINITIONS
****************************************************************************************************
*/
typedef enum{
MMU_ERR_NONE = 0,
MMU_ERR_STT_NOT_IMPLEMENTED,
MMU_ERR_ALIGN,
MMU_ERR_SIZE,
MMU_ERR_ENTRY_IN_USE
}MMU_ERR_T;
/*
****************************************************************************************************
* GENERAL DEFINES FOR MEMORY SPACE CONFIG
****************************************************************************************************
*/
typedef CPU_INT32U PAR_MEM_SIZE_T;
#define MMU_SIZE_1MB (CPU_INT32U)0x00100000 /*!< Region size 1Mbytes */
#define MMU_SIZE_2MB (CPU_INT32U)0x00200000 /*!< Region size 2Mbytes */
#define MMU_SIZE_4MB (CPU_INT32U)0x00400000 /*!< Region size 4Mbytes */
#define MMU_SIZE_8MB (CPU_INT32U)0x00800000 /*!< Region size 8Mbytes */
#define MMU_SIZE_16MB (CPU_INT32U)0x01000000 /*!< Region size 16Mbytes */
#define MMU_SIZE_32MB (CPU_INT32U)0x02000000 /*!< Region size 32Mbytes */
#define MMU_SIZE_64MB (CPU_INT32U)0x04000000 /*!< Region size 64Mbytes */
#define MMU_SIZE_128MB (CPU_INT32U)0x08000000 /*!< Region size 128Mbytes */
#define MMU_SIZE_256MB (CPU_INT32U)0x10000000 /*!< Region size 256Mbytes */
#define MMU_SIZE_512MB (CPU_INT32U)0x20000000 /*!< Region size 512Mbytes */
#define MMU_SIZE_1GB (CPU_INT32U)0x40000000 /*!< Region size 1Gbytes */
#define MMU_SIZE_2GB (CPU_INT32U)0x80000000 /*!< Region size 2Gbytes */
#define MMU_SIZE_4GB (CPU_INT32U)0x00000000 /*!< Region size 4Gbytes */
/*------------------------------------------------------------------------------------------------*/
/*!
* \brief GENERAL ACCESS PERMISSION DEFINES
*
*/
/*------------------------------------------------------------------------------------------------*/
typedef enum{
PAR_AP_P____U___ = 0, /* No Access */
PAR_AP_PRW__U___, /* Priviledged: R+W User: no access */
PAR_AP_PRW__UR__, /* Priviledged: R+W User: R */
PAR_AP_PRW__URW_, /* Priviledged: R+W User: R+W */
PAR_AP_RESERVED1, /* Reserved */
PAR_AP_PR___U___, /* Priviledged: R User: no access */
PAR_AP_PR___UR__, /* Priviledged: R User: R */
PAR_AP_RESERVED2 /* Reserved */
}PAR_MEM_AP_T;
/*------------------------------------------------------------------------------------------------*/
/*!
* \brief GENERAL HARDWARE IMPLEMENTATION DEPENDENT FLAGS
*
* \ingroup PAR_CPU_MMU
*
* This definitions must be used to configure the memory region hardware implementation
* dependent flags within the memory map (\ref PARMemTbl) table:
*/
/*------------------------------------------------------------------------------------------------*/
#define PAR_HID_F__ (CPU_INT32U)(0x00000000)
#define PAR_HID_F_S (CPU_INT32U)(0x00000100) /* Shareable: YES */
#define PAR_HID_F_NG (CPU_INT32U)(0x00000200) /* Non-Global: YES */
#define PAR_HID_F_XN (CPU_INT32U)(0x00000400) /* Execute-Never: YES */
#define PAR_HID_F_NS (CPU_INT32U)(0x00000800) /* Non-secure bit (only available for L1 page table) */
#define PAR_HID_CACHE_INNER___ (CPU_INT32U)(0x00000000) /* Non-Cachable */
#define PAR_HID_CACHE_INNER__B (CPU_INT32U)(0x00000001) /* Write Back, Write Allocate */
#define PAR_HID_CACHE_INNER_C_ (CPU_INT32U)(0x00000002) /* Write through, no write-allocate */
#define PAR_HID_CACHE_INNER_CB (CPU_INT32U)(0x00000003) /* Write Back, no write-allocate */
#define PAR_HID_CACHE_OUTER___ (CPU_INT32U)(0x00000000) /* Non-Cachable */
#define PAR_HID_CACHE_OUTER__B (CPU_INT32U)(0x00000004) /* Write Back, Write Allocate */
#define PAR_HID_CACHE_OUTER_C_ (CPU_INT32U)(0x00000008) /* Write through, no write-allocate */
#define PAR_HID_CACHE_OUTER_CB (CPU_INT32U)(0x0000000C) /* Write Back, no write-allocate */
#define PAR_HID_TEX_CB_STRONGLY_ORDERED (CPU_INT32U)(0x00000000) /* Strongly Ordered */
#define PAR_HID_TEX_CB_SHAREABLE_DEVICE (CPU_INT32U)(0x00000001) /* Shareable device */
#define PAR_HIT_TEX_CB_WRITE_THR_NO_ALLOCATE (CPU_INT32U)(0x00000002) /* Outer and inner write through, no allocate on write */
#define PAR_HID_TEX_CB_WRITEBACK_NO_ALLOCATE (CPU_INT32U)(0x00000003) /* Outer and inner write BACK, no allocate on write */
#define PAR_HID_TEX_CB_OUT_IN_NON_CACHABLE (CPU_INT32U)(0x00000004) /* Outer and inner non-cachable */
#define PAR_HID_TEX_CB_NON_SHAREABLE_DEVICE (CPU_INT32U)(0x0000000A) /* Non-Shareable device */
#define PAR_HID_TEX_CB_CACHED_MEMORY (CPU_INT32U)(0x00000010) /* Cached Memory, use PAR_HID_CACHE_OUTER_XX and PAR_HID_CACHE_INNER_XX to define policies */
#define PAR_HID_TEX_MASK (CPU_INT32U)(0x0000001C)
#define PAR_HID_CB_MASK (CPU_INT32U)(0x00000003)
/* short version for standard system device only accessible from hypervisor and cpu0, not shared between anyone, also called "Mein Schatz!" ;-) */
#define PAR_HID_EXCLUSIVE_SYS_DEVICE (CPU_INT32U)(PAR_HID_TEX_CB_NON_SHAREABLE_DEVICE | PAR_HID_F_NG | PAR_HID_F_XN)
/*
****************************************************************************************************
* TYPE DEFINITIONS
****************************************************************************************************
*/
/*------------------------------------------------------------------------------------------------*/
/*!
* \brief MEMORY SPACE CONFIGURATION STRUCT
*
* \ingroup PAR_CPU_MMU
*
* This structure holds the memory region definitions.
*/
/*------------------------------------------------------------------------------------------------*/
typedef struct {
CPU_INT32U VA_Start; /*!< Virtual Start Address */
CPU_INT32U PA_Start; /*!< Physical Start Address */
PAR_MEM_SIZE_T Size; /*!< Size of Memory Region */
PAR_MEM_AP_T AP; /*!< Access Permission of Memory Region */
CPU_INT32U HID; /*!< Hardware Implementation Dependent Field*/
} PAR_MEM_REGION_T, *PAR_MEM_REGION_REF_T;
/*
****************************************************************************************************
* TARGET SPECIFIC DEFINES
****************************************************************************************************
*/
#define FTT_SIZE 4096 /*!< Size of First Level Translation Table */
/*----- First Level Translation Table ------*/
#define FTT_TYPE (CPU_INT32U)0x00000003 /*!< First Level Descriptor Type Mask */
#define FTT_TYPE_FLT (CPU_INT32U)0x00000000 /*!< Type: Fault */
#define FTT_TYPE_PT (CPU_INT32U)0x00000001 /*!< Type: Page Table */
#define FTT_TYPE_SEC (CPU_INT32U)0x00000002 /*!< Type: Section (1MB) */
#define FTT_TYPE_RES (CPU_INT32U)0x00000003 /*!< Type: Reserved */
#define FTT_OWNER (CPU_INT32U)0x000001E0 /*!< First Level Descriptor Owner Mask */
/*----- Domain Management ------------------*/
#define PAR_DOMAIN_NOACCESS (CPU_INT32U)0x0 /*!< Domain: diable domain */
#define PAR_DOMAIN_CLIENT (CPU_INT32U)0x1 /*!< Domain: domain owner is client */
#define PAR_DOMAIN_MASTER (CPU_INT32U)0x3 /*!< Domain: domain owner is master */
/* TTBR0 Config (armv7refman B4.1.154) Outer Region | not-outer-shareable | inner region | shareable */
#define PAR_TTBR0_FLAGS (CPU_INT32U)((0x41 << 0) | (0x00 << 5u) | (0x03 << 3u) | (0x00 << 1u))
#define MMU_SCTLR_ACCESS_FLAG_ENABLE (0x01 << 29u) //Enable Access flag mode
#define MMU_SCTLR_RR_EN (0x01 << 14u) //Enable RoundRobin Cache Replacement
#define MMU_SCTLR_ICACHE_EN (0x01 << 12u) //Enable Instruction Cache
#define MMU_SCTLR_BRANCH_EN (0x01 << 11u) //Enable Branch Prediction
#define MMU_SCTLR_CACHE_EN (0x01 << 2u) //Enable Data and unified cache
#define MMU_SCTLR_MMU_EN (0x01 << 0u) //Enable MMU
#define MMU_SCTLR_SWP_EN (0x01 << 10u)
#define MMU_SCTLR_FLAGS (CPU_INT32U) (MMU_SCTLR_RR_EN \
| MMU_SCTLR_ICACHE_EN \
| MMU_SCTLR_BRANCH_EN \
| MMU_SCTLR_CACHE_EN \
| MMU_SCTLR_SWP_EN \
| MMU_SCTLR_MMU_EN )
/*
****************************************************************************************************
* FUNCTION PROTOTYPES
****************************************************************************************************
*/
MMU_ERR_T MMUInit (void);
#endif /* #ifndef _MMU_H_ */

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src/Modules/genericTaskset/cfgTemplate/gt_cfg.h Normal file
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/*
* gt_cfg.h
*
* Created on: Jan 15, 2019
* Author: Kai Gemlau
*/
#ifndef GT_CFG_H_
#define GT_CFG_H_
#define GT_USE_NP_REGIONS 1
#define GT_USE_NP_MEAS 1
#define GT_NUM_OF_TASKS 1
#define GT_REPORT_CONSOLE 0
#define GT_REPORT_SVC 0
#define GT_TTC_DEVICE_ID XPAR_PS7_TTC_2_DEVICE_ID
#define GT_TTC_PWM_INTR_ID XPAR_XTTCPS_2_INTR
#define GT_TIMER_TICKS_PER_SEC 10000
#include "gt_core_cfg.h"
#endif /* GT_CFG_H_ */

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src/Modules/genericTaskset/cfgTemplate/gt_core_cfg.h Normal file
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/*
* gt_core_cfg.h
*
* Created on: Jan 15, 2019
* Author: Kai Gemlau
*/
#ifndef GT_CORE_CFG_H_
#define GT_CORE_CFG_H_
#define GT_USE_CPU_CM7 0 /* Cortex M7 TODO: Specify */
#define GT_USE_CPU_ARM_V7_A 0 /* Cortex A9 @ 666MHz on Zynq 7000 */
#define GT_USE_CPU_PSUR5 1 /* Cortex R5 @ 100MHz on Zynq Ultrascale+ */
#define GT_STACKSIZE 256
#define GT_MAXQACT 5
#endif /* GT_CORE_CFG_H_ */

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src/Modules/genericTaskset/cfgTemplate/gt_tasks.c Normal file
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/*
* gt_tasks.c
*
* Created on: Aug 22, 2014
* Author: matthiasb
*/
#include "ucos_ii.h"
#include "gt_types.h"
#include "gt_cfg.h"
#include <stdlib.h> /* rand */
#include <string.h> /* memset */
/*-------------------------------Task model internal struct definitions-------------------------------*/
/*
* Internal task extension struct
*/
typedef struct
{
CPU_INT32U BCET;
CPU_INT32U WCET;
}GT_WL_CET_T;
/*
* Internal task extension struct
*/
typedef struct
{
CPU_INT32U Period;
CPU_INT32U Jitter;
CPU_INT32U Distance;
GT_WL_CET_T CET;
}GT_TASK_EXT_T;
/*------------------------------------Execution times and periods-------------------------------------*/
/*
* All times given in (1/10)ms
*/
/*
* Task model
*/
GT_TASK_EXT_T GT_AllTasks[GT_NUM_OF_TASKS] = {
/* P J D BCET WCET */
{10, 0, 0, {1, 1}},
{20, 0, 0, {2, 4}},
{50, 0, 0, {3, 5}},
{100, 0, 0, {35, 40}},
};
/*------------------------------------Internal call back functions-------------------------------------*/
/*
* Function to determine task execution time
*/
static CPU_INT32U _GT_GetTaskCet(GT_TASK_T * pThisTask)
{
/*
* Simple randomized jitter between BCET and WCET
*/
GT_TASK_EXT_T * pTaskExt = (GT_TASK_EXT_T*)pThisTask->Extension;
CPU_INT32U BCET = pTaskExt->CET.BCET;
CPU_INT32U WCET = pTaskExt->CET.WCET;
return (BCET < WCET) ? (WCET - (rand() % (WCET - BCET))) : WCET;
}
/*
* Function to determine next task activation
* For this model we use a simple PJD model
*/
static CPU_INT32U _GT_GetNextActivation(GT_TASK_T * pThisTask)
{
GT_TASK_EXT_T * pTaskExt = (GT_TASK_EXT_T*)pThisTask->Extension;
/*
* Calculate next activation based on PJ Model
*/
CPU_INT32S NextDistance = (pTaskExt->Jitter) ? pTaskExt->Period + (rand()%(pTaskExt->Jitter) - (pTaskExt->Jitter/2))
: pTaskExt->Period;
/*
* Adjust activation to PJD if needed
*/
return ((CPU_INT32S)pTaskExt->Distance > NextDistance) ? pTaskExt->Distance : (CPU_INT32U)NextDistance;
}
/*
* Main task table, used for GT_Init call
*/
GT_TASK_T GT_Tasks[GT_NUM_OF_TASKS] =
{
/*Type Activation Type Id Prio Next Activation CET Init Function Task Function D WL Internal External */
{ GT_TASK_DEF, GT_ACT_INT, 0, 30, _GT_GetNextActivation, _GT_GetTaskCet, NULL, NULL, 10, GT_RUNABLE_NULL, GT_INTERNAL_NULL, (void *)&GT_AllTasks[0]},
{ GT_TASK_DEF, GT_ACT_INT, 1, 31, _GT_GetNextActivation, _GT_GetTaskCet, NULL, NULL, 20, GT_RUNABLE_NULL, GT_INTERNAL_NULL, (void *)&GT_AllTasks[1]},
{ GT_TASK_DEF, GT_ACT_INT, 2, 32, _GT_GetNextActivation, _GT_GetTaskCet, NULL, NULL, 50, GT_RUNABLE_NULL, GT_INTERNAL_NULL, (void *)&GT_AllTasks[2]},
{ GT_TASK_DEF, GT_ACT_INT, 3, 33, _GT_GetNextActivation, _GT_GetTaskCet, NULL, NULL, 100, GT_RUNABLE_NULL, GT_INTERNAL_NULL, (void *)&GT_AllTasks[3]},
};
/*
* Internal activation
*/

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/*
* gt_stm32f7.c
*
* Created on: 05.06.2018
* Author: kaige
*/
#include "ucos_ii.h"
#include "gt_types.h"
#include "gt_core.h"
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include "xparameters.h"
#include "xstatus.h"
#include "xil_exception.h"
#include "xttcps.h"
#include "ucos_int.h"
/*
* Last interval / time since last interrupt
*/
static CPU_INT32U GT_LastInterval = 0;
/*
* Scaling factor used to convert GT Times to timer ticks
*/
static uint32_t GT_TickScalingFactor = 0;
/*
* Task Config Table
*/
extern volatile GT_TASK_T *GT_TaskTable;
/*
* Hardware Timer
*/
static XTtcPs GT_Timer;
/*
* Function to determine next task activation
* For this model we use a simple PJD model
*/
static CPU_INT32U _GT_GetNextActivation(GT_TASK_T * pThisTask)
{
GT_TASK_EXT_T * pTaskExt = (GT_TASK_EXT_T*)pThisTask->Extension;
/*
* Calculate next activation based on PJ Model
*/
CPU_INT32S NextDistance = (pTaskExt->Jitter) ? pTaskExt->Period + (rand()%(pTaskExt->Jitter) - (pTaskExt->Jitter/2))
: pTaskExt->Period;
/*
* Adjust activation to PJD if needed
*/
return ((CPU_INT32S)pTaskExt->Distance > NextDistance) ? pTaskExt->Distance : (CPU_INT32U)NextDistance;
}
static void GT_TickHandler(void *CallBackRef)
{
CPU_INT32U nextIRQ = 0xFFFFFFFF; /* The next activation of all tasks is used as next IRQ */
CPU_INT32U nextActivation = 0;
int i = 0;
GT_TASK_T *pTask;
u32 StatusEvent;
XTtcPs_Stop(&GT_Timer);
/*
* Read the interrupt status, then write it back to clear the interrupt.
*/
StatusEvent = XTtcPs_GetInterruptStatus(&GT_Timer);
XTtcPs_ClearInterruptStatus(&GT_Timer, StatusEvent);
if ((XTTCPS_IXR_INTERVAL_MASK & StatusEvent) != 0) {
for(i=0; i < GT_NUM_OF_TASKS; i++){
pTask = (GT_TASK_T *)&GT_TaskTable[i];
if(pTask->ActivationType == GT_ACT_INT && pTask->Internal.Ready)
{
if(GT_LastInterval < pTask->Internal.NextAct)
pTask->Internal.NextAct -= GT_LastInterval;
else
pTask->Internal.NextAct = 0;
if(!pTask->Internal.NextAct)
{
/*
* Get next activation time
*/
nextActivation = _GT_GetNextActivation(pTask);
pTask->Internal.NextAct = nextActivation;
/*
* Activate task
*/
GT_ActivateTask(i);
//pTask->Internal.NextAbsD=pTask->D;
if(nextActivation < nextIRQ){
nextIRQ = nextActivation;
}
}
}
}
GT_LastInterval = nextIRQ;
XTtcPs_SetInterval(&GT_Timer, nextIRQ * GT_TickScalingFactor);
}
XTtcPs_Start(&GT_Timer);
}
void GT_HW_InitTimer(){
int Status;
XTtcPs_Config *Config;
/*
* Look up the configuration based on the device identifier
* and initialize the device
*/
Config = XTtcPs_LookupConfig(GT_TTC_DEVICE_ID);
XTtcPs_CfgInitialize(&GT_Timer, Config, Config->BaseAddress);
/*
* Set the options and calculate prescaler
*/
XTtcPs_SetOptions(&GT_Timer, XTTCPS_OPTION_INTERVAL_MODE | XTTCPS_OPTION_WAVE_DISABLE);
/*
* Set the interval and prescaler
*/
#ifdef GT_USE_CPU_ARM_V7_A
/* Calculate Prescaler for TTC with 16 Bit width */
XTtcPs_SetPrescaler(&GT_Timer, 7);
GT_TickScalingFactor = GT_Timer.Config.InputClockHz / GT_TIMER_TICKS_PER_SEC / 256;
#else
/* Disable Prescaler for TTC with 32 Bit width */
XTtcPs_SetPrescaler(&GT_Timer, XTTCPS_CLK_CNTRL_PS_DISABLE);
GT_TickScalingFactor = GT_Timer.Config.InputClockHz / GT_TIMER_TICKS_PER_SEC;
#endif
XTtcPs_SetInterval(&GT_Timer, 0);
GT_LastInterval = 0;
UCOS_IntVectSet (GT_TTC_PWM_INTR_ID, 0u, 0u, GT_TickHandler, NULL);
UCOS_IntSrcEn (GT_TTC_PWM_INTR_ID);
/*
* Enable the interrupts for the tick timer/counter
* We only care about the interval timeout.
* Start the timer
*/
XTtcPs_EnableInterrupts(&GT_Timer, XTTCPS_IXR_INTERVAL_MASK);
XTtcPs_Start(&GT_Timer);
}

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src/Modules/genericTaskset/if/gt_core.h Normal file
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/*
* gt_core.h
*
* Created on: Aug 22, 2014
* Author: matthiasb
*/
#ifndef GT_CORE_H_
#define GT_CORE_H_
#include "ucos_ii.h"
#include "gt_types.h"
#include "gt_cfg.h"
extern void GT_Calibrate();
extern void GT_Init();
extern void GT_TimeTick(void);
extern void GT_TaskSw (void);
extern void GT_Stop(void);
extern void GT_ActivateTask(CPU_INT08U id);
extern CPU_INT32U GT_GetActivationNumber(void);
extern volatile CPU_INT32U GT_TaskNumber;
extern volatile GT_TASK_T *GT_TaskTable;
extern volatile CPU_INT32U GT_PrioOffset;
#endif /* GT_CORE_H_ */

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/*
* gt_cpu.h
*
* Created on: Aug 25, 2014
* Author: matthiasb
*/
#ifndef GT_CPU_H_
#define GT_CPU_H_
#include "gt_cfg.h"
#define __ARCH_ARM_V_5_ASSEMBLY(x,y,z) \
({ CPU_INT32U __mul = (x); \
CPU_INT32U __scale = (y); \
asm volatile( " mov r0,#0 \n\t" \
" mul r1,%0,%1 \n\t" \
"1: add r0,r0,#1 \n\t" \
" cmp r1,r0 \n\t" \
" bne 1b \n\t" \
: : "r" (__mul) , "r" (__scale) : ); })
#define __ARCH_ARM_V_7_ASSEMBLY(x,y,z) \
({ CPU_INT32U __mul = (x); \
CPU_INT32U __offset = (y); \
CPU_INT32U __scale = (z); \
asm volatile( " cbz %0,2f \n\t" \
" isb \n\t" \
" mul r0,%0,%1 \n\t" \
" subs r0,r0,%2 \n\t" \
"1: itt ne \n\t" \
" subsne r0,r0,#1 \n\t" \
" bne 1b \n\t" \
"2: \n\t" \
: : "r" (__mul) , "r" (__scale) ,"r" (__offset) : ); })
/*
* The task&runnable offsets heavily depend on the user implemented hook functions!
*
* The cycle scale is based on the used freq. and the arch. specific inline assembly
* In order to generate a suitable result, provide the input in 0.1ms: 1ms => 10
*
* You can overwrite this defaults with your app specific gt_cfg.h
*/
#if GT_USE_CPU_ARM9 > 0
#warning "Offsets for runables & tasks not supported in __ARCH_ARM_V_5_ASSEMBLY at the moment"
#ifndef GT_CPU_CYCLE_SCALE
#define GT_CPU_CYCLE_SCALE 5347 //arm9@200MHz
#endif
#ifndef GT_CPU_OS_RUNABLE_OFFSET
#error "TODO: GT_CPU_OS_RUNABLE_OFFSET for arm9@200MHz"
#endif
#ifndef GT_CPU_OS_TASK_OFFSET
#error "TODO: GT_CPU_OS_TASK_OFFSET for arm9@200MHz"
#endif
#define __burn_wcet(x,y) __ARCH_ARM_V_5_ASSEMBLY(x,y)
#endif
#if GT_USE_CPU_CM3 > 0
#ifndef GT_CPU_CYCLE_SCALE
#define GT_CPU_CYCLE_SCALE 2800 //cm3@120MHz
#endif
#ifndef GT_CPU_OS_RUNABLE_OFFSET
#define GT_CPU_OS_RUNABLE_OFFSET 950 //cm3@120MHz
#endif
#ifndef GT_CPU_OS_TASK_OFFSET
#define GT_CPU_OS_TASK_OFFSET 850 //cm3@120MHz
#endif
#define __burn_wcet(x,y,z) __ARCH_ARM_V_7_ASSEMBLY(x,y,z)
#endif
#if GT_USE_CPU_CM7 > 0
#ifndef GT_CPU_CYCLE_SCALE
#define GT_CPU_CYCLE_SCALE 7200
#endif
#ifndef GT_CPU_OS_RUNABLE_OFFSET
#define GT_CPU_OS_RUNABLE_OFFSET 1240
#endif
#ifndef GT_CPU_OS_TASK_OFFSET
#define GT_CPU_OS_TASK_OFFSET 200//1110
#endif
#define __burn_wcet(x,y,z) __ARCH_ARM_V_7_ASSEMBLY(x,y,z)
#endif
#if GT_USE_CPU_ARM_V7_A > 0
#ifndef GT_CPU_CYCLE_SCALE
#define GT_CPU_CYCLE_SCALE 25000 //armv7a@666MHz
#endif
#ifndef GT_CPU_OS_RUNABLE_OFFSET
#define GT_CPU_OS_RUNABLE_OFFSET 1240
#endif
#ifndef GT_CPU_OS_TASK_OFFSET
#define GT_CPU_OS_TASK_OFFSET 3000 //extrapoliert von CM3 auf cortex_a9@666,666MHz
#endif
#define __burn_wcet(x,y,z) __ARCH_ARM_V_7_ASSEMBLY(x,y,z)
#endif
#if GT_USE_CPU_PSUR5 > 0
#ifndef GT_CPU_CYCLE_SCALE
#define GT_CPU_CYCLE_SCALE 10000 /* Cortex R5 @ 100MHz */
#endif
#ifndef GT_CPU_OS_RUNABLE_OFFSET
#define GT_CPU_OS_RUNABLE_OFFSET 0 /* Not used yet */
#endif
#ifndef GT_CPU_OS_TASK_OFFSET
#define GT_CPU_OS_TASK_OFFSET 0 /* Not used yet */
#endif
#define __burn_wcet(x,y,z) __ARCH_ARM_V_7_ASSEMBLY(x,y,z)
#endif
#endif /* GT_CPU_H_ */

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src/Modules/genericTaskset/if/gt_hw_port.h Normal file
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/*
* gt_hw_port.h
*
* Created on: 05.06.2018
* Author: kaige
*/
#ifndef SRC_MODULES_GENERICTASKSET_IF_GT_HW_PORT_H_
#define SRC_MODULES_GENERICTASKSET_IF_GT_HW_PORT_H_
void GT_HW_InitTimer();
#endif /* SRC_MODULES_GENERICTASKSET_IF_GT_HW_PORT_H_ */

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src/Modules/genericTaskset/if/gt_types.h Normal file
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/*
* gt_types.h
*
* Created on: Aug 19, 2014
* Author: matthiasb
*/
#ifndef GT_TYPES_H_
#define GT_TYPES_H_
#include "cpu.h"
#include "ucos_ii.h"
#include "gt_cfg.h"
#define GT_INTERNAL_NULL {0,0,0,0,0,0,0,0,"\0\0\0\0"}
#define GT_RUNABLE_NULL {0,0,(void *)0}
typedef struct _GT_TASK_T GT_TASK_T;
typedef struct
{
OS_TCB *pTCB;
CPU_INT32U CurrAct;
CPU_INT32U NextAct;
OS_EVENT *pActQ;
CPU_INT08U Ready;
CPU_INT32U ActCounter;
CPU_INT32U SeqNr;
CPU_INT32U NextAbsD;
CPU_INT08U Name[4];
}GT_RT_VAL_T;
typedef enum
{
GT_TASK_DEF = 0, /* Default Task (burns CET) */
GT_TASK_RUN = 1, /* Task consisting fo runnables (that burn CET) */
GT_TASK_EXT = 2, /* External task described by init and loop function */
}GT_TYPE_T;
typedef enum {
GT_ACT_OFF = 0, /* Task is not activated */
GT_ACT_INT = 1, /* Task is activated by generic taskset */
GT_ACT_EXT = 2, /* Task has an external activation */
GT_ACT_ONE = 3, /* Task is activated once (task create) */
}GT_ACTIVATION_TYPE;
struct _GT_TASK_T
{
GT_TYPE_T Type;
GT_ACTIVATION_TYPE ActivationType;
CPU_INT08U Id;
CPU_INT08U Prio;
int (*TaskInitFunction)(void*);
int (*TaskFunction)(void*);
void* TaskArg;
struct
{
CPU_INT32U Count;
CPU_INT32U Max;
void *Extension;
}Runable;
GT_RT_VAL_T Internal;
void * Extension;
};
/*
* Internal task extension struct
*/
/*
* Internal task extension struct
*/
typedef struct
{
CPU_INT32U BCET;
CPU_INT32U WCET;
}GT_WL_CET_T;
typedef struct
{
CPU_INT32U Period;
CPU_INT32U Jitter;
CPU_INT32U Distance;
GT_WL_CET_T CET;
}GT_TASK_EXT_T;
typedef struct
{
GT_TASK_T *pTaskTable;
CPU_INT08U TaskCount;
void *Extension;
}GT_INIT_T;
#endif /* GT_TYPES_H_ */

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src/Modules/genericTaskset/src/gt_core.c Normal file
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/*
* gt_core.c
*
* Created on: Aug 19, 2014
* Author: matthiasb
*/
#include "gt_cfg.h" /* Module config */
//#include "gt_hooks.h" /* Module hooks */
#include "gt_types.h" /* Typedef */
#include "gt_cpu.h" /* CPU assembly */
#include "gt_hw_port.h"
#include <string.h> /* memcpy */
#include <stdio.h>
#include <stdlib.h> /* rand */
/*
* Global varibales
*/
//volatile CPU_INT32U GT_TaskNumber = 0;
volatile GT_TASK_T *GT_TaskTable = (GT_TASK_T *)0;
extern GT_TASK_T GT_Tasks[];
/*
* Internal variables
*/
static OS_STK TASK_STACKS[GT_NUM_OF_TASKS][GT_STACKSIZE];
static void * ActivationQ[GT_NUM_OF_TASKS][GT_MAXQACT];
/*
* Function prototypes for static inline functions
* We always inline functions to reduce the RAM usage, therefore we can minimize the stack sizes
*/
static void _GT_TaskLoop (GT_TASK_T *pMyOwnTask) __attribute__ ((always_inline));
static void _GT_RunableLoop (GT_TASK_T *pMyOwnTask) __attribute__ ((always_inline));
/**
* Weak functions for hooks that are not implemented
*/
__attribute__((weak)) void GT_TaskStartHook(GT_TASK_T *pMyOwnTask) {(void)pMyOwnTask;return;}
__attribute__((weak)) void GT_TaskEndHook(GT_TASK_T *pMyOwnTask){return;}
__attribute__((weak)) void GT_RunableStartHook(GT_TASK_T *pMyOwnTask){(void)pMyOwnTask;return;}
__attribute__((weak)) void GT_RunableEndHook(GT_TASK_T *pMyOwnTask){return;}
__attribute__((weak)) void GT_TaskSwHook (GT_TASK_T *pMyOwnTask){return;}
__attribute__((weak)) void GT_InitHook(GT_INIT_T * pInit){return;}
__attribute__((weak)) void GT_StopHook(void){return;}
__attribute__((weak)) volatile void GT_CalibrateStartHook(void){return;}
__attribute__((weak)) volatile void GT_CalibrateEndHook(void){return;}
inline static void _GT_WaitForActivation(GT_TASK_T *pMyOwnTask){
INT8U err = OS_ERR_NONE;
if(pMyOwnTask->ActivationType != GT_ACT_ONE)
pMyOwnTask->Internal.CurrAct = (CPU_INT32U)OSQPend(pMyOwnTask->Internal.pActQ,0,&err);
}
/*
* Function to determine task execution time
*/
static CPU_INT32U _GT_GetTaskCet(GT_TASK_T * pThisTask)
{
/*
* Simple randomized jitter between BCET and WCET
*/
GT_TASK_EXT_T * pTaskExt = (GT_TASK_EXT_T*)pThisTask->Extension;
CPU_INT32U BCET = pTaskExt->CET.BCET;
CPU_INT32U WCET = pTaskExt->CET.WCET;
return (BCET < WCET) ? (WCET - (rand() % (WCET - BCET + 1))) : WCET;
}
/*
* Hook function for default task main loop
*/
inline static void _GT_TaskLoop(GT_TASK_T *pMyOwnTask)
{
OS_CPU_SR cpu_sr = 0;
OS_ENTER_CRITICAL();
pMyOwnTask->Internal.Ready = 1;
OS_EXIT_CRITICAL();
for(;;)
{
_GT_WaitForActivation(pMyOwnTask);
/*
* Call task start hook
*/
GT_TaskStartHook(pMyOwnTask);
/*
* Determine CET
*/
CPU_INT32U CET = _GT_GetTaskCet(pMyOwnTask);
/*
* Burn CET
*/
__burn_wcet(CET,GT_CPU_OS_TASK_OFFSET,GT_CPU_CYCLE_SCALE);
/*
* Call task end hook
*/
GT_TaskEndHook(pMyOwnTask);
/*
* Increment sequence number
*/
pMyOwnTask->Internal.SeqNr++;
}
}
/*
* Hook function for runable task main loop
*/
inline static void _GT_RunableLoop(GT_TASK_T *pMyOwnTask)
{
OS_CPU_SR cpu_sr = 0;
OS_ENTER_CRITICAL();
pMyOwnTask->Internal.Ready = 1;
OS_EXIT_CRITICAL();
for(;;)
{
_GT_WaitForActivation(pMyOwnTask);
for(pMyOwnTask->Runable.Count=0;
pMyOwnTask->Runable.Count < pMyOwnTask->Runable.Max;
pMyOwnTask->Runable.Count++)
{
/*
* Call runable start hook
*/
GT_RunableStartHook(pMyOwnTask);
/*
* Determine CET
*/
CPU_INT32U CET = _GT_GetTaskCet(pMyOwnTask);
/*
* Burn WCET
*/
__burn_wcet(CET,GT_CPU_OS_RUNABLE_OFFSET,GT_CPU_CYCLE_SCALE);
/*
* Call runable end hook
*/
GT_RunableEndHook(pMyOwnTask);
}
}
}
/*
* Hook function for external task main loop
*/
inline static void _GT_ExtTaskLoop(GT_TASK_T *pMyOwnTask)
{
OS_CPU_SR cpu_sr = 0;
OS_ENTER_CRITICAL();
pMyOwnTask->Internal.Ready = 1;
OS_EXIT_CRITICAL();
for(;;)
{
_GT_WaitForActivation(pMyOwnTask);
/*
* Call task start hook
*/
GT_TaskStartHook(pMyOwnTask);
/*
* Execute Real Task
*/
if(pMyOwnTask->TaskFunction(pMyOwnTask->TaskArg) < 0){
OSTaskDel(OS_PRIO_SELF);
}
/*
* Call task end hook
*/
GT_TaskEndHook(pMyOwnTask);
/*
* Increment sequence number
*/
pMyOwnTask->Internal.SeqNr++;
}
}
/*
* Reentrant task body
*/
static void _GT_Task(void *pArg)
{
GT_TASK_T *pMyOwnTask = (GT_TASK_T *)pArg;
if(pMyOwnTask->Type == GT_TASK_EXT && pMyOwnTask->TaskInitFunction != NULL){
CPU_INT32U result = pMyOwnTask->TaskInitFunction(pMyOwnTask->TaskArg);
if(result < 0){
printf("GT: Init function returned -1\n");
OSTaskSuspend(OS_PRIO_SELF);
}
}
/*
* Determine task type and call
* corresponding loop hook
*/
switch(pMyOwnTask->Type)
{
case GT_TASK_DEF:
_GT_TaskLoop(pMyOwnTask);
break;
case GT_TASK_RUN:
_GT_RunableLoop(pMyOwnTask);
break;
case GT_TASK_EXT:
_GT_ExtTaskLoop(pMyOwnTask);
break;
}
}
/*
* add this function to "void App_TaskSwHook (void){}"
*/
void GT_TaskSw (void)
{
uint16_t id = OSTCBHighRdy->OSTCBId;
if(id <= GT_NUM_OF_TASKS){
GT_TaskSwHook(&GT_Tasks[id]);
}
}
/*
* Helper function to calibrate GT_CPU_CYCLE_SCALE and GT_CPU_OS_TASK_OFFSET for gt_cpu.h
* Set Tracepoint on the "nop" command to trace runtime.
* Start by setting GT_CPU_OS_TASK_OFFSET=0 and try to calibrate long delays by modyfing GT_CPU_CYCLE_SCALE
* Then start to increase GT_CPU_OS_TASK_OFFSET to fix offset for short delays
* Use this before any other background jobs (like OS Tasks) are started
* (at the beginning of your main when for example caching is configured)
*/
void GT_Calibrate()
{
int i = 0;
int delay = 1;
for(i = 0; i < 10; i++){
GT_CalibrateStartHook();
__burn_wcet(delay,GT_CPU_OS_TASK_OFFSET,GT_CPU_CYCLE_SCALE);
GT_CalibrateEndHook();
delay = delay * 2;
}
}
/*
* Init function for GT module
*/
void GT_Init()
{
CPU_INT08U i = 0;
CPU_INT08U err = OS_ERR_NONE;
/*
* Init task stacks
*/
memset(TASK_STACKS,0,sizeof(CPU_STK)*GT_NUM_OF_TASKS*GT_STACKSIZE);
/*
* Init internal variables
*/
GT_TASK_T *pTasks = GT_Tasks;
/*
* Create tasks
*/
for(i=0;i<GT_NUM_OF_TASKS;i++)
{
if(pTasks[i].ActivationType == GT_ACT_OFF)
continue;
if(pTasks[i].ActivationType != GT_ACT_ONE){
pTasks[i].Internal.pActQ = OSQCreate(&ActivationQ[i][0],GT_MAXQACT);
if(pTasks[i].Internal.pActQ == (OS_EVENT*)0){
printf("GT: Error while creating a message queue\n");
return;
}
}
//pTasks[i].GetNextAct = _GT_GetNextActivation;
INT16U opt = OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR;
/* Enable stack checking and clear stack */
#if OS_SCHED_EDF_EN > 0
opt |= OS_TASK_OPT_SCHED_EDF; /* Add EDF scheduling paradigm if needed */
#endif
err = OSTaskCreateExt( _GT_Task, /* Application task */
(void *)&pTasks[i], /* argument passed to the task */
&TASK_STACKS[i][GT_STACKSIZE-1],/* Set Top-Of-Stack */
pTasks[i].Prio, /* Set priority level */
pTasks[i].Id, /* ID -> Index of the created task */
&TASK_STACKS[i][0], /* Set Bottom-Of-Stack */
GT_STACKSIZE, /* Stacksize */
(void *)0, /* TCB extension */
opt);
if(err != OS_ERR_NONE){
printf("GT: Error while creating a task\n");
return;
}
sprintf((char *)pTasks[i].Internal.Name,"T%02d",pTasks[i].Id);
#if OS_TASK_NAME_EN > 0
/* Give the Task a name */
OSTaskNameSet ( pTasks[i].Prio,(CPU_INT08U *)pTasks[i].Internal.Name, &err);
#endif
#if OS_EVENT_NAME_EN > 0
/* Give the activation queue the tasks name */
OSEventNameSet(pTasks[i].Internal.pActQ,(CPU_INT08U *)pTasks[i].Internal.Name, &err);
#endif
/*
* Add cross reference to corresponding
* task control block
*/
pTasks[i].Internal.pTCB = OSTCBPrioTbl[pTasks[i].Prio];
}
/*
* Call init hook
*/
GT_InitHook(NULL);
/*
* Wait 1ms to start the tasks and
* release tasks
*/
OSTimeDly(OS_TICKS_PER_SEC/100);
GT_TaskTable = pTasks;
GT_HW_InitTimer();
}
/*
* Stop taskset
*/
void GT_Stop(void)
{
CPU_INT08U i = 0;
OS_CPU_SR cpu_sr = 0;
if(GT_TaskTable)
{
OS_ENTER_CRITICAL();
for(i=0;i<GT_NUM_OF_TASKS;i++)
{
OSTaskSuspend(GT_TaskTable[i].Prio);
}
GT_TaskTable = 0;
OS_EXIT_CRITICAL();
}
GT_StopHook();
}
void GT_ActivateTask(CPU_INT08U id){
if(GT_TaskTable[id].ActivationType != GT_ACT_OFF){
OSQPost(GT_TaskTable[id].Internal.pActQ,(void *)0);
GT_TaskTable[id].Internal.ActCounter++;
}
}
CPU_INT32U GT_GetActivationNumber(void){
return GT_TaskTable[OSTCBCur->OSTCBId].Internal.SeqNr;
}

23
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LICENSE INFORMATION
TLSF is released as LGPL and GPL. A copy of both licences can be found in this
directoy. For the GPL licence, the following exception applies.
TLSF is free software; you can redistribute it and/or modify it under terms of
the GNU General Public License as published by the Free Software Foundation;
either version 2, or (at your option) any later version. TLSF is distributed
in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the
implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
the GNU General Public License for more details. You should have received a
copy of the GNU General Public License along with TLSF; see file COPYING. If
not, write to the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139,
USA.
As a special exception, including TLSF header files in a file, or linking with
other files objects to produce an executable application, is merely considered
normal use of the library, and does *not* fall under the heading of "derived
work". Therfore does not by itself cause the resulting executable application
to be covered by the GNU General Public License. This exception does not
however invalidate any other reasons why the executable file might be covered
by the GNU Public License.

132
src/Modules/tlsf/Changelog Normal file
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Version History
---------------
-v2.4.6 (September 10 2009)
* Fixed a bug in the realloc func (discovered by the rockbox
project: www.rockbox.org).
-v2.4.5 (November 24 2008)
* Working on OSX/FreeBSD (may be for OpenBSD/NetBSD too).
Reported by Younès HAFRI.
printf (and stdio.h include) is now optional.
Reported by Masaki Muranaka
-v2.4.4 (October 13 2008)
* Corrected minor syntactic bug on statistic gathering code.
Reported by Tim Cussins and P. Mantegazza.
-v2.4.3 (July 30 2008)
* Minor fixes to compile with the greenhills compiler.
Reported by "Kaya, Sinan SEA" <sinan.kaya@siemens.com>
* Small change in the license in order to include TLSF in the RTEMS
project.
-v2.4.2 (May 16 2008) (Herman ten Brugge)
* Memory usage statistics added again, with cleaner and more compacted
code.
-v2.4.1 (April 30 2008)
* Fixed a bug in the tlsf_realloc function: init the pool automatically
on the first call.
Reported by: Alejandro Mery <amery@geeks.cl>
-v2.4 (Feb 19 2008)
* "rtl_*" functions renamed to "tlsf_*".
* Added the add_new_area function to insert new memory areas to an
existing memory pool.
* A single TLSF pool can manage non-contiguous memory areas.
* Support for mmap and sbrk added.
* The init_memory_pool is not longer needed when used on a system
with mmap or sbrk.
* Removed the get_used_size counting.The same functionality can be
implemented outside the TLSF code.
-v2.3.2 (Sep 27 2007)
* Minor cosmetic code improvements.
-v2.3.1 (Jul 30 2007)
* Fixed some minor bugs in the version 2.3. Herman ten Brugge
<hermantenbrugge@home.nl>
-v2.3 (Jul 28 2007) Released a new version with all the contributions
received from Herman ten Brugge <hermantenbrugge@home.nl>
(This is his summary of changes in the TLSF's code):
* Add 64 bit support. It now runs on x86_64 and solaris64.
* I also tested this on vxworks/32 and solaris/32 and i386/32
processors.
* Remove assembly code. I could not measure any performance difference
on my core2 processor. This also makes the code more portable.
* Moved defines/typedefs from tlsf.h to tlsf.c
* Changed MIN_BLOCK_SIZE to sizeof (free_ptr_t) and BHDR_OVERHEAD to
(sizeof (bhdr_t) - MIN_BLOCK_SIZE). This does not change the fact
that the minumum size is still sizeof (bhdr_t).
* Changed all C++ comment style to C style. (// -> /* ... *./)
* Used ls_bit instead of ffs and ms_bit instead of fls. I did this to
avoid confusion with the standard ffs function which returns
different values.
* Created set_bit/clear_bit fuctions because they are not present
on x86_64.
* Added locking support + extra file target.h to show how to use it.
* Added get_used_size function
* Added rtl_realloc and rtl_calloc function
* Implemented realloc clever support.
* Added some test code in the example directory.
-- Thank you very much for your help Herman!
-v2.2.1 (Oct 23 2006)
* Support for ARMv5 implemented by Adam Scislowicz
<proteuskor@gmail.com>. Thank you for your contribution.
- v2.2.0 (Jun 30 2006) Miguel Masmano & Ismael Ripoll.
* Blocks smaller than 128 bytes are stored on a single
segregated list. The already existing bits maps and data
structures are used.
* Minor code speed-up improvements.
* Worst case response time both on malloc and free improved.
* External fragmantation also improved!.
* Segragared lists are AGAIN sorted by LIFO order. Version
2.1b was proven to be no better than 2.1.
- v2.1b: Allocation policy has been always a LIFO Good-Fit, that
is, between several free blocks in the same range, TLSF will
always allocate the most recently released. In this version of
TLSF, we have implemented a FIFO Good-Fit. However,
fragmentation doesn't seems to be altered so is it worth it?.
- v2.1: Realloc and calloc included again in TLSF 2.0.
- v2.0: In this version, TLSF has been programmed from scratch.
Now the allocator is provided as an unique file. Realloc and
calloc are not longer implemented.
- v1.4: Created the section "Version History". Studied real
behaviour of actual applications (regular applications tend
to require small memory blocks (less than 16 bytes) whereas
TLSF is optimised to be used with blocks larger than 16
bytes: Added special lists to deal with blocks smaller than
16 bytes.
- v1.3: Change of concept, now the main TLSF structure is created
inside of the beginning of the block instead of being an
static structure, allowing multiple TLSFs working at the
same time. Now, TLSF uses specific processor instructions to
deal with bitmaps. TLSF sanity functions added to find TLSF
overflows. The TLSF code will not be RTLinux-oriented any
more.
- v1.1 ... v1.2: Many little bugs fixed, code cleaned and splitted
in several files because of cosmetic requirements.
Starting from TLSF v1.1, MaRTE OS
(http://marte.unican.es) uses the TLSF allocator
as its default memory allocator.
- v0.1 ... v1.0: First implementations were created for testing and
research purposes. Basically TLSF is implemented to
be used by RTLinux-GPL (www.rtlinux-gpl.org), so
it is RTLinux-oriented.

280
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GNU GENERAL PUBLIC LICENSE
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510
src/Modules/tlsf/LGPL-2.1.txt Normal file
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@@ -0,0 +1,510 @@
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That's all there is to it!

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TLSF Memory Storage allocator implementation.
Version 2.4.6 Sept 2009
Authors: Miguel Masmano, Ismael Ripoll & Alfons Crespo.
Copyright UPVLC, OCERA Consortium.
TLSF is released in the GPL/LGPL licence. The exact terms of the licence
are described in the COPYING file.
This component provides basic memory allocation functions:
malloc and free, as defined in the standard "C" library.
This allocator was designed to provide real-time performance, that is:
1.- Bounded time malloc and free.
2.- Fast response time.
3.- Efficient memory management, that is low fragmentation.
The worst response time for both malloc and free is O(1).
How to use it:
This code is prepared to be used as a stand-alone code that can be
linked with a regular application or it can be compiled to be a Linux
module (which required the BigPhysicalArea patch). Initially the
module was designed to work jointly with RTLinux-GPL, but it can be
used as a stand alone Linux module.
When compiled as a regular linux process the API is:
Initialisation and destruction functions
----------------------------------------
init_memory_pool may be called before any request or release call:
- size_t init_memory_pool(size_t, void *);
- void destroy_memory_pool(void *);
Request and release functions
-----------------------------
As can be seen, there are two functions for each traditional memory
allocation function (malloc, free, realloc, and calloc). One with the
prefix "tlsf_" and the other with the suffix "_ex".
The versions with the prefix "tlsf_" provides the expected behaviour,
that is, allocating/releasing memory from the default memory pool. The
default memory pool is the last pool initialised by the
init_memory_pool function.
On the other hand, the functions with the prefix "_ex" enable the use of several memory pools.
- void *tlsf_malloc(size_t);
- void *malloc_ex(size_t, void *);
- void tlsf_free(void *ptr);
- void free_ex(void *, void *);
- void *tlsf_realloc(void *ptr, size_t size);
- void *realloc_ex(void *, size_t, void *);
- void *tlsf_calloc(size_t nelem, size_t elem_size);
- void *calloc_ex(size_t, size_t, void *);
EXAMPLE OF USE:
char memory_pool[1024*1024];
{
...
init_memory_pool(1024*1024, memory_pool);
...
ptr1=malloc_ex(100, memory_pool);
ptr2=tlsf_malloc(100); // This function will use memory_pool
...
tlsf_free(ptr2);
free_ex(ptr1, memory_pool);
}
Growing the memory pool
-----------------------
Starting from the version 2.4, the function add_new_area adds an
memory area to an existing memory pool.
- size_t add_new_area(void *, size_t, void *);
This feature is pretty useful when an existing memory pool is running
low and we want to add more free memory to it.
EXAMPLE OF USE:
char memory_pool[1024*1024];
char memory_pool2[1024*1024];
{
...
init_memory_pool(1024*1024, memory_pool);
...
ptr[0]=malloc_ex(1024*256 memory_pool);
ptr[1]=malloc_ex(1024*512, memory_pool);
add_new_area(memory_pool2, 1024*1024, memory_pool);
// Now we have an extra free memory area of 1Mb
// The next malloc may not fail
ptr[2]=malloc_ex(1024*512, memory_pool);
...
}
SBRK and MMAP support
---------------------
The version 2.4 can use the functions SBRK and MMAP to _automatically_
growing the memory pool, before running out of memory.
So, when this feature is enabled, unless the operating system were out
of memory, a malloc operation would not fail due to an "out-of-memory"
error.
To enable this support, compile tlsf.c with the FLAGS -DUSE_MMAP=1 or
-DUSE_SBRK=1 depending on whether you want to use "mmap" or "sbrk" or both.
** By default (default Makefile) this feature is enabled.
EXAMPLE OF USE:
gcc -o tlsf.o -O2 -Wall -DUSE_MMAP=1 -DUSE_SBRK=1
---
If the sbrk/mmap support is enabled and we are _only_ going to use one
memory pool, it is not necessary to call init_memory_pool
EXAMPLE OF USE (with MMAP/SBRK support enabled):
{
...
ptr2=tlsf_malloc(100); // This function will use memory_pool
...
tlsf_free(ptr2);
}
This work has been supported by the followin projects:
EUROPEAN: IST-2001-35102(OCERA) http://www.ocera.org.
SPANISH: TIN2005-08665-C3-03

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To do list
==========
* Add mmap/sbrk support (DONE - V2.4).
* TLSF rounds-up request size to the head of a free list.
It has been shown to be a good policy for small blocks (<2048).
But for larger blocks this policy may cause excesive fragmentation.
A deeper analisys should be done.

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#ifndef _TARGET_H_
#define _TARGET_H_
#include "ucos_ii.h"
#include "tlsf.h"
//uCOS-II port - make semaphore available to TLSF
#define TLSF_MLOCK_T OS_EVENT*
#define TLSF_CREATE_LOCK(l) *(l) = OSSemCreate(1)
#define TLSF_DESTROY_LOCK(l) INT8U err; OSSemDel(*(l), OS_DEL_ALWAYS, &err)
#define TLSF_ACQUIRE_LOCK(l) INT8U err; OSSemPend(*(l), 0, &err)
#define TLSF_RELEASE_LOCK(l) OSSemPost(*(l))
#endif

1017
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39
src/Modules/tlsf/tlsf.h Normal file
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/*
* Two Levels Segregate Fit memory allocator (TLSF)
* Version 2.4.6
*
* Written by Miguel Masmano Tello <mimastel@doctor.upv.es>
*
* Thanks to Ismael Ripoll for his suggestions and reviews
*
* Copyright (C) 2008, 2007, 2006, 2005, 2004
*
* This code is released using a dual license strategy: GPL/LGPL
* You can choose the licence that better fits your requirements.
*
* Released under the terms of the GNU General Public License Version 2.0
* Released under the terms of the GNU Lesser General Public License Version 2.1
*
*/
#ifndef _TLSF_H_
#define _TLSF_H_
#include <sys/types.h>
extern size_t init_memory_pool(size_t, void *);
extern size_t get_used_size(void *);
extern size_t get_max_size(void *);
extern void destroy_memory_pool(void *);
extern size_t add_new_area(void *, size_t, void *);
extern void *malloc_ex(size_t, void *);
extern void free_ex(void *, void *);
extern void *realloc_ex(void *, size_t, void *);
extern void *calloc_ex(size_t, size_t, void *);
extern void *tlsf_malloc(size_t size);
extern void tlsf_free(void *ptr);
extern void *tlsf_realloc(void *ptr, size_t size);
extern void *tlsf_calloc(size_t nelem, size_t elem_size);
#endif