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@ -21,6 +21,7 @@
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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#include "SEGGER_SYSVIEW.h"
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#include "SEGGER_RTT.h"
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#include "stm32g0b1xx.h"
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#include "stm32g0xx_hal_cortex.h"
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@ -62,30 +63,80 @@ static void MX_GPIO_Init(void);
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uint8_t rxBuffer[BUFFER_SIZE];
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uint16_t rxBufferPos = 0;
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void init_UART1(){
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void init_UART1_it(){
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RCC->APBENR2 |= RCC_APBENR2_USART1EN;
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RCC->IOPENR |= RCC_IOPENR_GPIOCEN;
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GPIOC->MODER &= ~GPIO_MODER_MODE5; // Alternate function mode on RX pin
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GPIOC->MODER |= GPIO_MODER_MODE5_1;
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GPIOC->AFR[0] &= GPIO_AFRL_AFSEL5;
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GPIOC->AFR[0] |= 1 << GPIO_AFRL_AFSEL5_Pos;
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GPIOC->AFR[0] |= 1 << GPIO_AFRL_AFSEL5_Pos; // AF1 -> USART1 RX
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USART1->BRR = 128; // 32000000÷250000
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USART1->CR1 = USART_CR1_RE;
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USART1->CR3 |= USART_CR3_EIE;
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USART1->CR1 |= USART_CR1_RXNEIE_RXFNEIE;
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USART1->CR3 |= USART_CR3_EIE; // Interrupt on BREAK (and other errors)
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USART1->CR1 |= USART_CR1_RXNEIE_RXFNEIE; // RX Interrupt
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USART1->CR1 |= USART_CR1_UE;
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HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
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HAL_NVIC_EnableIRQ(USART1_IRQn);
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}
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/* USER CODE END 0 */
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void init_UART1_dma(){
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RCC->IOPENR |= RCC_IOPENR_GPIOCEN;
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RCC->APBENR2 |= RCC_APBENR2_USART1EN;
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RCC->AHBENR |= RCC_AHBENR_DMA1EN;
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GPIOC->MODER &= ~GPIO_MODER_MODE5; // Alternate function mode on RX pin
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GPIOC->MODER |= GPIO_MODER_MODE5_1;
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GPIOC->AFR[0] &= GPIO_AFRL_AFSEL5;
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GPIOC->AFR[0] |= 1 << GPIO_AFRL_AFSEL5_Pos; // AF1 -> USART1 RX
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USART1->BRR = 256; // 64000000÷250000
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USART1->CR1 = USART_CR1_RE;
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USART1->CR3 |= USART_CR3_EIE; // Interrupt on BREAK (and other errors)
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USART1->CR3 |= USART_CR3_DMAR; // DMA Receiver mode
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DMA1_Channel1->CCR = (0x02 << DMA_CCR_PL_Pos) | DMA_CCR_MINC | DMA_CCR_TCIE;
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DMA1_Channel1->CMAR = ( uint32_t )&rxBuffer[0];
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DMA1_Channel1->CPAR = ( uint32_t )&(USART1->RDR);
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DMA1_Channel1->CNDTR = 5;
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DMAMUX1_Channel0->CCR &= ~( DMAMUX_CxCR_DMAREQ_ID );
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DMAMUX1_Channel0->CCR |= ( 50 << DMAMUX_CxCR_DMAREQ_ID_Pos ); // 50 -> USART1 RX
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USART1->CR1 |= USART_CR1_UE;
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HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
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HAL_NVIC_EnableIRQ(USART1_IRQn);
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HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
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HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
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}
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void Reset_DMA(void) {
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// Disable the DMA channel
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DMA1_Channel1->CCR &= ~DMA_CCR_EN; // Disable DMA Channel 1
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// Clear the transfer complete flag
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DMA1->IFCR |= DMA_IFCR_CTCIF1; // Clear transfer complete flag for Channel 1
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// Reconfigure the DMA
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DMA1_Channel1->CMAR = (uint32_t)rxBuffer; // Set memory address to the start of the buffer
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DMA1_Channel1->CNDTR = BUFFER_SIZE; // Set number of data items to transfer
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// Enable the DMA channel again
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DMA1_Channel1->CCR |= DMA_CCR_EN; // Enable DMA Channel 1
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}
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void USART1_IRQHandler(){
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SEGGER_SYSVIEW_RecordEnterISR();
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if(USART1->ISR & USART_ISR_RXNE_RXFNE){
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//SEGGER_SYSVIEW_PrintfHost("RXNE");
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//printf("%x ", USART1->RDR);
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rxBuffer[rxBufferPos++] = USART1->RDR;
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if(rxBufferPos >= BUFFER_SIZE){
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@ -94,17 +145,24 @@ void USART1_IRQHandler(){
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}
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if(USART1->ISR & USART_ISR_FE){
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//TODO read rx==0
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USART1->ICR = USART_ICR_FECF;
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printf("FE after %d\n",rxBufferPos);
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rxBufferPos = 0;
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printf("buf: ");
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for(uint16_t i=0; i<10; i++)
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printf("0x%02X ", rxBuffer[i]);
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printf("\n");
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//if(rxBufferPos != 514)
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// printf("FE after %d\n",rxBufferPos);
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//rxBufferPos = 0;
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//DMA1_Channel1->CNDTR = 1;
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SEGGER_SYSVIEW_PrintfHost("FE");
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Reset_DMA();
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//DMA1_Channel1->CCR &= ~( DMA_CCR_EN );
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//DMA1_Channel1->CNDTR = 512;
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//DMA1_Channel1->CMAR = ( uint32_t )&rxBuffer[0];
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//DMA1_Channel1->CCR |= ( DMA_CCR_EN );
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////DMA1_Channel1->CCR |= ( DMA_CCR_EN );
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}
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if(USART1->ISR & USART_ISR_ORE){
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USART1->ICR = USART_ICR_ORECF;
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printf("ORE\n");
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//printf("ORE\n");
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//SEGGER_SYSVIEW_PrintfHost("ORE");
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}
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if(USART1->ISR & USART_ISR_NE){
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USART1->ICR = USART_ICR_NECF;
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@ -114,7 +172,39 @@ void USART1_IRQHandler(){
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USART1->ICR = USART_ICR_UDRCF;
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printf("UDR\n");
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}
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SEGGER_SYSVIEW_RecordExitISR();
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}
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void DMA1_Channel1_IRQHandler(){
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SEGGER_SYSVIEW_RecordEnterISR();
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if(DMA1->ISR & DMA_ISR_TCIF1){
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DMA1->IFCR = DMA_IFCR_CTCIF1;
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}
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SEGGER_SYSVIEW_PrintfHost("DMA");
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SEGGER_SYSVIEW_RecordExitISR();
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}
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void init_stepper(){
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RCC->IOPENR |= RCC_IOPENR_GPIOBEN;
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RCC->IOPENR |= RCC_IOPENR_GPIOCEN;
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RCC->IOPENR |= RCC_IOPENR_GPIOEEN;
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// Set to output (00: Input, 01: Output, 10: Alternate function, 11: Analog)
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// PB4 Direction
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GPIOB->MODER &= ~(0x3 << (4 * 2)); // Clear mode bits for PB4
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GPIOB->MODER |= (0x1 << (4 * 2)); // Set mode to output for PB4
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// PC11 Enable
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GPIOC->MODER &= ~(0x3 << (11 * 2)); // Clear mode bits for PC11
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GPIOC->MODER |= (0x1 << (11 * 2)); // Set mode to output for PC11
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// PE2 Step
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GPIOE->MODER &= ~(0x3 << (2 * 2)); // Clear mode bits for PE2
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GPIOE->MODER |= (0x1 << (2 * 2)); // Set mode to output for PE2
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GPIOC->BSRR |= GPIO_BSRR_BS11;
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}
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/* USER CODE END 0 */
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/**
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* @brief The application entry point.
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@ -123,8 +213,6 @@ void USART1_IRQHandler(){
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int main(void)
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{
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/* USER CODE BEGIN 1 */
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SEGGER_RTT_ConfigUpBuffer(0, NULL, NULL, 0, SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL);
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printf("Moin!\n");
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/* USER CODE END 1 */
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/* MCU Configuration--------------------------------------------------------*/
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@ -140,20 +228,35 @@ int main(void)
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SystemClock_Config();
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/* USER CODE BEGIN SysInit */
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SEGGER_RTT_ConfigUpBuffer(0, NULL, NULL, 0, SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL);
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printf("Moin!\n");
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SEGGER_SYSVIEW_Conf(); /* Configure and initialize SystemView */
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/* USER CODE END SysInit */
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/* Initialize all configured peripherals */
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MX_GPIO_Init();
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/* USER CODE BEGIN 2 */
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init_UART1();
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init_UART1_dma();
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init_stepper();
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/* USER CODE END 2 */
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/* Infinite loop */
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/* USER CODE BEGIN WHILE */
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//HAL_UART_Receive_DMA(&huart1, rxBuffer, BUFFER_SIZE);
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uint16_t cnt = 0;
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while (1)
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{
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printf("buf: ");
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for(uint16_t i=0; i<10; i++)
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printf("0x%02X ", rxBuffer[i]);
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printf("\n");
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SEGGER_SYSVIEW_OnIdle();
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if(cnt++ >= 260-rxBuffer[1]){
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cnt = 0;
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GPIOE->ODR ^= GPIO_ODR_OD2;
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}
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/* USER CODE END WHILE */
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/* USER CODE BEGIN 3 */
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@ -182,7 +285,7 @@ void SystemClock_Config(void)
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
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RCC_OscInitStruct.PLL.PLLN = 8;
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RCC_OscInitStruct.PLL.PLLN = 16;
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
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RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
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RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
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@ -199,7 +302,7 @@ void SystemClock_Config(void)
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
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{
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Error_Handler();
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}
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